Texas Instruments MSP430F5529

A1A2
A3
A4
A5A6
A7
A8
B1B2
B3
B4
B5B6
B7
B8
C1C2
D1D2D4
D5D6
D7
D8
E1E2E4
E5E6
E7
E8
F1F2F4
F5F8
G1G2G4
G5G8
H1H2H4
H5H6
H7
H8
C4
C5C6
C7
C8
D3
E3
F3
G3
H3
F6
G6
F7
G7
C3
P6.2P6.6
AVCC1
AVSS1
P5.4P5.5
DVCC1
DVSS1
P6.0P6.4
P6.5
P5.0
P5.1P1.1
P1.0
VCORE
PJ.2
PJ.3
P5.3AVSS2PJ.1
RST/NMI
P1.5
P1.6
P1.7
P5.2V18P4.7
P2.0
P2.3
P2.2P2.1
VUSBVBUSP4.3
P4.0P2.4
PU.1
PUR
P4.2
P3.4P3.0
PU.0
VSSU
P4.1
DVCC2DVSS2
P3.1
P2.7
P6.3
P6.7P1.2
P1.4
P1.3
PJ.0
TEST
P4.6
P4.5
P4.4
P2.6
P3.3
P2.5
P3.2
P6.1
TOP VIEW
BALL-SIDE VIEW
A1 A2
A3
A4
A5 A6
A7
A8
B1 B2
B3
B4
B5 B6
B7
B8
C1 C2
D1 D2 D4
D5 D6
D7
D8
E1 E2 E4
E5 E6
E7
E8
F1 F2 F4
F5 F8
G1 G2 G4
G5 G8
H1 H2 H4
H5 H6
H7
H8
C4
C5 C6
C7
C8
D3
E3
F3
G3
H3
F6
G6
F7
G7
C3
P6.2 P6.6
AVCC1
AVSS1
P5.4 P5.5
DVCC1
DVSS1
P6.0 P6.4
P6.5
P5.0
P5.1 P1.1
P1.0
VCORE
PJ.2
PJ.3
P5.3 AVSS2 PJ.1
RST/NMI
P1.5
P1.6
P1.7
P5.2 V18 P4.7
P2.0
P2.3
P2.2 P2.1
VUSB VBUS P4.3
P4.0 P2.4
PU.1
PUR
P4.2
P3.4 P3.0
PU.0
VSSU
P4.1
DVCC2 DVSS2
P3.1
P2.7
P6.3
P6.7 P1.2
P1.4
P1.3
PJ.0
TEST
P4.6
P4.5
P4.4
P2.6
P3.3
P2.5
P3.2
P6.1
D
E
D
E
MSP430F5529 , MSP430F5528 , MSP430F5527 , MSP430F5526
MSP430F5525 , MSP430F5524 , MSP430F5522 , MSP430F5521
MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513
www.ti.com SLAS590M –MARCH 2009–REVISED NOVEMBER 2015
Figure 4-6 shows the pinout for the MSP430F5528, MSP430F5526, and MSP430F5524 devices in the
YFF package.
Figure 4-6. Pin Designation – MSP430F5528IYFF, MSP430F5526IYFF, MSP430F5524IYFF
Copyright © 2009–2015, Texas Instruments Incorporated Terminal Configuration and Functions 13
Submit Documentation Feedback
Product Folder Links: MSP430F5529 MSP430F5528 MSP430F5527 MSP430F5526 MSP430F5525 MSP430F5524
MSP430F5522 MSP430F5521 MSP430F5519 MSP430F5517 MSP430F5515 MSP430F5514 MSP430F5513