Texas Instruments MSP430F5529 User Manual

MSP430F5529 , MSP430F5528 , MSP430F5527 , MSP430F5526
MSP430F5525 , MSP430F5524 , MSP430F5522 , MSP430F5521
MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513
www.ti.com SLAS590M –MARCH 2009–REVISED NOVEMBER 2015
Table 4-1. Terminal Functions (continued)
TERMINAL
NO. I/O
(1)
DESCRIPTION
NAME
PN RGC YFF ZQE
DVCC1 18 15 A7 H1 Digital power supply
DVSS1 19 16 A8 J1 Digital ground supply
VCORE
(2)
20 17 B8 J2 Regulated core power supply output (internal use only, no external current loading)
General-purpose digital I/O with port interrupt
P1.0/TA0CLK/ACLK 21 18 B7 H2 I/O TA0 clock signal TA0CLK input
ACLK output (divided by 1, 2, 4, 8, 16, or 32)
General-purpose digital I/O with port interrupt
P1.1/TA0.0 22 19 B6 H3 I/O TA0 CCR0 capture: CCI0A input, compare: Out0 output
BSL transmit output
General-purpose digital I/O with port interrupt
P1.2/TA0.1 23 20 C6 J3 I/O TA0 CCR1 capture: CCI1A input, compare: Out1 output
BSL receive input
General-purpose digital I/O with port interrupt
P1.3/TA0.2 24 21 C8 G4 I/O
TA0 CCR2 capture: CCI2A input, compare: Out2 output
General-purpose digital I/O with port interrupt
P1.4/TA0.3 25 22 C7 H4 I/O
TA0 CCR3 capture: CCI3A input compare: Out3 output
General-purpose digital I/O with port interrupt
P1.5/TA0.4 26 23 D6 J4 I/O
TA0 CCR4 capture: CCI4A input, compare: Out4 output
General-purpose digital I/O with port interrupt
P1.6/TA1CLK/CBOUT 27 24 D7 G5 I/O TA1 clock signal TA1CLK input
Comparator_B output
General-purpose digital I/O with port interrupt
P1.7/TA1.0 28 25 D8 H5 I/O
TA1 CCR0 capture: CCI0A input, compare: Out0 output
General-purpose digital I/O with port interrupt
P2.0/TA1.1 29 26 E5 J5 I/O
TA1 CCR1 capture: CCI1A input, compare: Out1 output
General-purpose digital I/O with port interrupt
P2.1/TA1.2 30 27 E8 G6 I/O
TA1 CCR2 capture: CCI2A input, compare: Out2 output
General-purpose digital I/O with port interrupt
P2.2/TA2CLK/SMCLK 31 28 E7 J6 I/O TA2 clock signal TA2CLK input
SMCLK output
General-purpose digital I/O with port interrupt
P2.3/TA2.0 32 29 E6 H6 I/O
TA2 CCR0 capture: CCI0A input, compare: Out0 output
General-purpose digital I/O with port interrupt
P2.4/TA2.1 33 30 F8 J7 I/O
TA2 CCR1 capture: CCI1A input, compare: Out1 output
General-purpose digital I/O with port interrupt
P2.5/TA2.2 34 31 F7 J8 I/O
TA2 CCR2 capture: CCI2A input, compare: Out2 output
General-purpose digital I/O with port interrupt
P2.6/RTCCLK/DMAE0 35 32 F6 J9 I/O RTC clock output for calibration
DMA external trigger input
General-purpose digital I/O with port interrupt
Slave transmit enable – USCI_B0 SPI mode
P2.7/UCB0STE/UCA0CLK 36 33 H8 H7 I/O
Clock signal input – USCI_A0 SPI slave mode
Clock signal output – USCI_A0 SPI master mode
General-purpose digital I/O
Slave in, master out – USCI_B0 SPI mode
P3.0/UCB0SIMO/UCB0SDA 37 34 G8 H8 I/O
I
2
C data – USCI_B0 I
2
C mode
(2) VCORE is for internal use only. No external current loading is possible. VCORE should only be connected to the recommended
capacitor value, C
VCORE
.
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Texas Instruments MSP430F5529 Specifications

General

Brand	Texas Instruments
Model	MSP430F5529
Category	Microcontrollers
Language	English