Texas Instruments MSP430F5529 User Manual

MSP430F5529 , MSP430F5528 , MSP430F5527 , MSP430F5526
MSP430F5525 , MSP430F5524 , MSP430F5522 , MSP430F5521
MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513
SLAS590M –MARCH 2009–REVISED NOVEMBER 2015 www.ti.com
Table 4-1. Terminal Functions (continued)
TERMINAL
NO. I/O
(1)
DESCRIPTION
NAME
PN RGC YFF ZQE
General-purpose digital I/O
Slave out, master in – USCI_B0 SPI mode
P3.1/UCB0SOMI/UCB0SCL 38 35 H7 H9 I/O
I
2
C clock – USCI_B0 I
2
C mode
General-purpose digital I/O
Clock signal input – USCI_B0 SPI slave mode
P3.2/UCB0CLK/UCA0STE 39 36 G7 G8 I/O
Clock signal output – USCI_B0 SPI master mode
Slave transmit enable – USCI_A0 SPI mode
General-purpose digital I/O
P3.3/UCA0TXD/UCA0SIMO 40 37 G6 G9 I/O Transmit data – USCI_A0 UART mode
Slave in, master out – USCI_A0 SPI mode
General-purpose digital I/O
P3.4/UCA0RXD/UCA0SOMI 41 38 G5 G7 I/O Receive data – USCI_A0 UART mode
Slave out, master in – USCI_A0 SPI mode
General-purpose digital I/O (not available on F5528, F5526, F5524, F5522, F5514,
F5513 devices)
P3.5/TB0.5 42 N/A N/A N/A I/O
TB0 CCR5 capture: CCI5A input, compare: Out5 output
General-purpose digital I/O (not available on F5528, F5526, F5524, F5522, F5514,
F5513 devices)
P3.6/TB0.6 43 N/A N/A N/A I/O
TB0 CCR6 capture: CCI6A input, compare: Out6 output
General-purpose digital I/O (not available on F5528, F5526, F5524, F5522, F5514,
F5513 devices)
P3.7/TB0OUTH/SVMOUT 44 N/A N/A N/A I/O Switch all PWM outputs high impedance input – TB0 (not available on F5528,
F5526, F5524, F5522, F5514, F5513 devices)
SVM output (not available on F5528, F5526, F5524, F5522, F5514, F5513 devices)
General-purpose digital I/O with reconfigurable port mapping secondary function
Default mapping: Slave transmit enable – USCI_B1 SPI mode
P4.0/PM_UCB1STE/
45 41 F5 E8 I/O
PM_UCA1CLK
Default mapping: Clock signal input – USCI_A1 SPI slave mode
Default mapping: Clock signal output – USCI_A1 SPI master mode
General-purpose digital I/O with reconfigurable port mapping secondary function
P4.1/PM_UCB1SIMO/
Default mapping: Slave in, master out – USCI_B1 SPI mode
46 42 H4 E7 I/O
PM_UCB1SDA
Default mapping: I
2
C data – USCI_B1 I
2
C mode
General-purpose digital I/O with reconfigurable port mapping secondary function
P4.2/PM_UCB1SOMI/
Default mapping: Slave out, master in – USCI_B1 SPI mode
47 43 G4 D9 I/O
PM_UCB1SCL
Default mapping: I
2
C clock – USCI_B1 I
2
C mode
General-purpose digital I/O with reconfigurable port mapping secondary function
Default mapping: Clock signal input – USCI_B1 SPI slave mode
P4.3/PM_UCB1CLK/
48 44 F4 D8 I/O
PM_UCA1STE
Default mapping: Clock signal output – USCI_B1 SPI master mode
Default mapping: Slave transmit enable – USCI_A1 SPI mode
DVSS2 49 39 H6 F9 Digital ground supply
DVCC2 50 40 H5 E9 Digital power supply
General-purpose digital I/O with reconfigurable port mapping secondary function
P4.4/PM_UCA1TXD/
51 45 H3 D7 I/O Default mapping: Transmit data – USCI_A1 UART mode
PM_UCA1SIMO
Default mapping: Slave in, master out – USCI_A1 SPI mode
General-purpose digital I/O with reconfigurable port mapping secondary function
P4.5/PM_UCA1RXD/
52 46 G3 C9 I/O Default mapping: Receive data – USCI_A1 UART mode
PM_UCA1SOMI
Default mapping: Slave out, master in – USCI_A1 SPI mode
General-purpose digital I/O with reconfigurable port mapping secondary function
P4.6/PM_NONE 53 47 F3 C8 I/O
Default mapping: no secondary function.
General-purpose digital I/O with reconfigurable port mapping secondary function
P4.7/PM_NONE 54 48 E4 C7 I/O
Default mapping: no secondary function.
16 Terminal Configuration and Functions Copyright © 2009–2015, Texas Instruments Incorporated
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Texas Instruments MSP430F5529 Specifications

General

Brand	Texas Instruments
Model	MSP430F5529
Category	Microcontrollers
Language	English