Texas Instruments MSP430F5529

P5.5/XOUT
1
0
P5DIR.5
P5IN.5
EN
Module X IN
1
0
Module X OUT
P5OUT.5
1
0
DV
SS
DV
CC
P5REN.5
Pad Logic
1
P5DS.5
0: Low drive
1: High drive
D
Bus
Keeper
to XT1
P5SEL.4
XT1BYPASS
P5SEL.5
MSP430F5529 , MSP430F5528 , MSP430F5527 , MSP430F5526
MSP430F5525 , MSP430F5524 , MSP430F5522 , MSP430F5521
MSP430F5519, MSP430F5517, MSP430F5515, MSP430F5514, MSP430F5513
www.ti.com SLAS590M –MARCH 2009–REVISED NOVEMBER 2015
Table 6-52. Port P5 (P5.4 and P5.5) Pin Functions
CONTROL BITS OR SIGNALS
(1)
PIN NAME (P5.x) x FUNCTION
P5DIR.x P5SEL.4 P5SEL.5 XT1BYPASS
P5.4/XIN 4 P5.4 (I/O) I: 0; O: 1 0 X X
XIN crystal mode
(2)
X 1 X 0
XIN bypass mode
(2)
X 1 X 1
P5.5/XOUT 5 P5.5 (I/O) I: 0; O: 1 0 0 X
XOUT crystal mode
(3)
X 1 X 0
P5.5 (I/O)
(3)
X 1 0 1
(1) X = Don't care
(2) Setting P5SEL.4 causes the general-purpose I/O to be disabled. Pending the setting of XT1BYPASS, P5.4 is configured for crystal
mode or bypass mode.
(3) Setting P5SEL.4 causes the general-purpose I/O to be disabled in crystal mode. When using bypass mode, P5.5 can be used as
general-purpose I/O.
Copyright © 2009–2015, Texas Instruments Incorporated Detailed Description 91
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