Texas Instruments RM46L852 User Manual

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RM46L852
www.ti.com SPNS185 –SEPTEMBER 2012
Table 4-29. EMIF Asynchronous Memory Switching Characteristics
(1)(2)(3)
(continued)
NO Parameter Value Unit
MIN NOM MAX
Output hold time, EMIFnWE -3 0 +3 ns
high to EMIFCS[4:2] high (SS =
1)
18 t
su(EMDQMV-EMWEL)
Output setup time, EMIFBA[1:0] (WS)*E-3 (WS)*E (WS)*E+3 ns
valid to EMIFnWE low
19 t
h(EMWEH-EMDQMIV)
Output hold time, EMIFnWE (WH)*E-3 (WH)*E (WH)*E+3 ns
high to EMIFBA[1:0] invalid
20 t
su(EMBAV-EMWEL)
Output setup time, EMIFBA[1:0] (WS)*E-3 (WS)*E (WS)*E+3 ns
valid to EMIFnWE low
21 t
h(EMWEH-EMBAIV)
Output hold time, EMIFnWE (WH)*E-3 (WH)*E (WH)*E+3 ns
high to EMIFBA[1:0] invalid
22 t
su(EMAV-EMWEL)
Output setup time, (WS)*E-3 (WS)*E (WS)*E+3 ns
EMIFADDR[12:0] valid to
EMIFnWE low
23 t
h(EMWEH-EMAIV)
Output hold time, EMIFnWE (WH)*E-3 (WH)*E (WH)*E+3 ns
high to EMIFADDR[12:0] invalid
24 t
w(EMWEL)
EMIFnWE active low width (EW (WST)*E-3 (WST)*E (WST)*E+3 ns
= 0)
EMIFnWE active low width (EW (WST+(EWC*1 (WST+(EWC*1 (WST+(EWC*1 ns
= 1) 6)) *E-3 6))*E 6)) *E+3
25 t
d(EMWAITH-EMWEH)
Delay time from EMIFnWAIT 3E-3 4E 4E+3 ns
deasserted to EMIFnWE high
26 t
su(EMDV-EMWEL)
Output setup time, (WS)*E-3 (WS)*E (WS)*E+3 ns
EMIFDATA[15:0] valid to
EMIFnWE low
27 t
h(EMWEH-EMDIV)
Output hold time, EMIFnWE (WH)*E-3 (WH)*E (WH)*E+3 ns
high to EMIFDATA[15:0] invalid
Table 4-30. EMIF Synchronous Memory Timing Requirements
NO. Parameter MIN MAX Unit
19 t
su(EMIFDV-EM_CLKH)
Input setup time, read data valid on 1 ns
EMIFDATA[15:0] before EMIF_CLK
rising
20 t
h(CLKH-DIV)
Input hold time, read data valid on 1.5 ns
EMIFDATA[15:0] after EMIF_CLK
rising
Table 4-31. EMIF Synchronous Memory Switching Characteristics
NO. Parameter MIN MAX Unit
1 t
c(CLK)
Cycle time, EMIF clock EMIF_CLK 10 ns
2 t
w(CLK)
Pulse width, EMIF clock EMIF_CLK 3 ns
high or low
3 t
d(CLKH-CSV)
Delay time, EMIF_CLK rising to 7 ns
EMIFnCS[0] valid
4 t
oh(CLKH-CSIV)
Output hold time, EMIF_CLK rising to 1 ns
EMIFnCS[0] invalid
5 t
d(CLKH-DQMV)
Delay time, EMIF_CLK rising to 7 ns
EMIFnDQM[1:0] valid
6 t
oh(CLKH-DQMIV)
Output hold time, EMIF_CLK rising to 1 ns
EMIFnDQM[1:0] invalid
7 t
d(CLKH-AV)
Delay time, EMIF_CLK rising to 7 ns
EMIFADDR[12:0] and EMIFBA[1:0]
valid
Copyright © 2012, Texas Instruments Incorporated System Information and Electrical Specifications 93
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Texas Instruments RM46L852 Specifications

General

Brand	Texas Instruments
Model	RM46L852
Category	Microcontrollers
Language	English