Texas Instruments TMS320C6748 User Manual

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TMS320C6748
SPRS590G –JUNE 2009–REVISED JANUARY 2017 www.ti.com
Table 6-72. Additional SPI0 Master Timings, 5-Pin Option
(1)(2)(3)
(continued)
NO. PARAMETER
1.3V, 1.2V 1.1V 1.0V
UNIT
MIN MAX MIN MAX MIN MAX
(7) If SPI0_ENA is asserted immediately such that the transmission is not delayed by SPI0_ENA.
(8) In the case where the master SPI is ready with new data before SPI0_SCS assertion.
(9) This delay can be increased under software control by the register bit field SPIDELAY.C2TDELAY[4:0].
(10) If SPI0_ENA was initially deasserted high and SPI0_CLK is delayed.
22 t
d(SCS_SPC)M
Delay from SPI0_SCS active to
first SPI0_CLK
(7) (8) (9)
Polarity = 0, Phase = 0,
to SPI0_CLK rising
2P-2 2P-2 2P-3
ns
Polarity = 0, Phase = 1,
to SPI0_CLK rising
0.5M+2P-2 0.5M+2P-2 0.5M+2P-3
Polarity = 1, Phase = 0,
to SPI0_CLK falling
2P-2 2P-2 2P-3
Polarity = 1, Phase = 1,
to SPI0_CLK falling
0.5M+2P-2 0.5M+2P-2 0.5M+2P-3
23 t
d(ENA_SPC)M
Delay from assertion of SPI0_ENA
low to first SPI0_CLK edge.
(10)
Polarity = 0, Phase = 0,
to SPI0_CLK rising
3P+5 3P+5 3P+6
ns
Polarity = 0, Phase = 1,
to SPI0_CLK rising
0.5M+3P+5 0.5M+3P+5 0.5M+3P+6
Polarity = 1, Phase = 0,
to SPI0_CLK falling
3P+5 3P+5 3P+6
Polarity = 1, Phase = 1,
to SPI0_CLK falling
0.5M+3P+5 0.5M+3P+5 0.5M+3P+6
(1) These parameters are in addition to the general timings for SPI slave modes (Table 6-69).
(2) P = SYSCLK2 period; M = t
c(SPC)M
(SPI master bit clock period)
(3) Figure shows only Polarity = 0, Phase = 0 as an example. Table gives parameters for all four slave clocking modes.
Table 6-73. Additional SPI0 Slave Timings, 4-Pin Enable Option
(1)(2)(3)
NO. PARAMETER
1.3V, 1.2V 1.1V 1.0V
UNIT
MIN MAX MIN MAX MIN MAX
24 t
d(SPC_ENAH)S
Delay from final SPI0_CLK edge
to slave deasserting SPI0_ENA.
Polarity = 0, Phase = 0,
from SPI0_CLK falling
1.5P-3 2.5P+17.5 1.5P-3 2.5P+20 1.5P-3 2.5P+27
ns
Polarity = 0, Phase = 1,
from SPI0_CLK falling
– 0.5M+1.5P-3 – 0.5M+2.5P+17.5 – 0.5M+1.5P-3 – 0.5M+2.5P+20 – 0.5M+1.5P-3 – 0.5M+2.5P+27
Polarity = 1, Phase = 0,
from SPI0_CLK rising
1.5P-3 2.5P+17.5 1.5P-3 2.5P+20 1.5P-3 2.5P+27
Polarity = 1, Phase = 1,
from SPI0_CLK rising
– 0.5M+1.5P-3 – 0.5+2.5P+17.5 – 0.5M+1.5P-3 – 0.5+2.5P+20 – 0.5M+1.5P-3 – 0.5+2.5P+27

Texas Instruments TMS320C6748 Specifications

General

Brand	Texas Instruments
Model	TMS320C6748
Category	Control Unit
Language	English