Xilinx VCU118

VCU118 Board User Guide 137
UG1224 (v1.0) December 15, 2016
www.xilinx.com
Appendix B: Master Constraints File Listing
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A0"];
set_property PACKAGE_PIN C29 [get_ports "RLD3_C3_72B_A1"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A1"];
set_property PACKAGE_PIN D29 [get_ports "RLD3_C3_72B_A2"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A2"];
set_property PACKAGE_PIN B30 [get_ports "RLD3_C3_72B_A3"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A3"];
set_property PACKAGE_PIN C30 [get_ports "RLD3_C3_72B_A4"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A4"];
set_property PACKAGE_PIN A31 [get_ports "RLD3_C3_72B_A5"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A5"];
set_property PACKAGE_PIN A30 [get_ports "RLD3_C3_72B_A6"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A6"];
set_property PACKAGE_PIN A33 [get_ports "RLD3_C3_72B_A7"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A7"];
set_property PACKAGE_PIN B33 [get_ports "RLD3_C3_72B_A8"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A8"];
set_property PACKAGE_PIN B32 [get_ports "RLD3_C3_72B_A9"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A9"];
set_property PACKAGE_PIN B31 [get_ports "RLD3_C3_72B_A10"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A10"];
set_property PACKAGE_PIN C33 [get_ports "RLD3_C3_72B_A11"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A11"];
set_property PACKAGE_PIN C32 [get_ports "RLD3_C3_72B_A12"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A12"];
set_property PACKAGE_PIN D30 [get_ports "RLD3_C3_72B_A13"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A13"];
set_property PACKAGE_PIN E29 [get_ports "RLD3_C3_72B_A14"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A14"];
set_property PACKAGE_PIN F29 [get_ports "RLD3_C3_72B_A15"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A15"];
set_property PACKAGE_PIN D32 [get_ports "RLD3_C3_72B_A16"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A16"];
set_property PACKAGE_PIN E32 [get_ports "RLD3_C3_72B_A17"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A17"];
set_property PACKAGE_PIN D31 [get_ports "RLD3_C3_72B_A18"];
set_property IOSTANDARD SSTL12 [get_ports "RLD3_C3_72B_A18"];
set_property PACKAGE_PIN E31 [get_ports "RLD3_C3_72B_A19"];
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