VCU118 Board User Guide 71
UG1224 (v1.0) December 15, 2016
www.xilinx.com
Chapter 3: Board Component Descriptions
For additional information about UltraScale PCIe functionality, see UltraScale Architecture
Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156) [Ref 8]. Additional
information about the PCI Express standard is available at the PCI Express® standard
website [Ref 23].
AF1 MGTYRXN2_226 PCIE_RX5_N B38 HSON(5)
AG4 MGTYRXP1_226 PCIE_RX6_P B41 HSOP(6)
AG3 MGTYRXN1_226 PCIE_RX6_N B42 HSON(6)
AH2 MGTYRXP0_226 PCIE_RX7_P B45 HSOP(7)
AH1 MGTYRXN0_226 PCIE_RX7_N B46 HSON(7)
AJ4 MGTYRXP3_225 PCIE_RX8_P B50 HSOP(8)
AJ3 MGTYRXN3_225 PCIE_RX8_N B51 HSON(8)
AK2 MGTYRXP2_225 PCIE_RX9_P B54 HSOP(9)
AK1 MGTYRXN2_225 PCIE_RX9_N B55 HSON(9)
AM2 MGTYRXP1_225 PCIE_RX10_P B58 HSOP(10)
AM1 MGTYRXN1_225 PCIE_RX10_N B59 HSON(10)
AP2 MGTYRXP0_225 PCIE_RX11_P B62 HSOP(11)
AP1 MGTYRXN0_225 PCIE_RX11_N B63 HSON(11)
AT2 MGTYRXP3_224 PCIE_RX12_P B66 HSOP(12)
AT1 MGTYRXN3_224 PCIE_RX12_N B67 HSON(12)
AV2 MGTYRXP2_224 PCIE_RX13_P B70 HSOP(13)
AV1 MGTYRXN2_224 PCIE_RX13_N B71 HSON(13)
AY2 MGTYRXP1_224 PCIE_RX14_P B74 HSOP(14)
AY1 MGTYRXN1_224 PCIE_RX14_N B75 HSON(14)
BB2 MGTYRXP0_224 PCIE_RX15_P B78 HSOP(15)
BB1 MGTYRXN0_224 PCIE_RX15_N B79 HSON(15)
Table 3-21: VCU118 Board FPGA U1 to PCIe Edge U2 Connections (Cont’d)
FPGA (U1) Pin
FPGA (U1) Pin
Name
Schematic Net
Name
PCIe Edge U2
Pin Num Pin Name