101 AIMB-276 User Manual
Appendix A I/O Pin Assignments
A.29 Low-voltage differential signaling interface/
Embedded displayport (LVDS_EDP1)
Pin Signal Pin Signal
1VDD 21A2P
2VDD 22A6P
3DET# 23GND
4GND 24GND
5 VDD 25 CLK1N(EDP_CPU_TXN3)
6 VDD 26 CLK2N
7 A0N(EDP_CPU_TXN2) 27 CLK1P(EDP_CPU_TXP3)
8 A4N 28 CLK2P
9 A0P(EDP_CPU_TXP2) 29 GND
10 A4P 30 GND
11 GND 31 SCD
12 GND 32 SDD
13 A1N 33 GND
14 A5N 34 GND(EDP_CH7511_HPD)
15 A1P 35 A3N
16 A5P 36 A7N
17 GND 37 A3P
18 GND 38 A7P
19 A2N 39 ENBKL
20 A6N 40 VCON
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