Configuring the FPGA in JTAG Mode
Figure 4-3 illustrates the JTAG configuration setup. To download a configuration bit stream into
the Cyclone IV E FPGA, perform the following steps:
Ensure that power is applied to the DE2-115 board
Configure the JTAG programming circuit by setting the RUN/PROG slide switch (SW19) to the
RUN position (See Figure 4-4)
Connect the supplied USB cable to the USB Blaster port on the DE2-115 board (See Figure
2-1)
The FPGA can now be programmed by using the Quartus II Programmer to select a
configuration bit stream file with the .sof filename extension
Figure 4-3 The JTAG configuration scheme
Figure 4-4 The RUN/PROG switch (SW19) is set in JTAG mode
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