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Altera DE2-115 - Using the USB Interface

Altera DE2-115
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The DE2-115 board provides both USB host and device interfaces using the Philips ISP1362
single-chip USB controller. The host and device controllers are compliant with the Universal Serial
Bus Specification Rev. 2.0, supporting data transfer at full-speed (12 Mbit/s) and low-speed (1.5
Mbit/s). Figure 4-31 shows the schematic diagram of the USB circuitry; the pin assignments for the
associated interface are listed in Table 4-25.
Detailed information for using the ISP1362 device is available in its datasheet and programming
guide; both documents can be found on the manufacturers website, or in the
DE2_115_datasheets\USB folder on the DE2-115 System CD. The most challenging part of a USB
application is in the design of the software driver needed. Two complete examples of USB drivers,
for both host and device applications, can be found in Sections 6.4 and 6.5. These demonstrations
provide examples of software drivers for the Nios II processor.
Figure 4-31 Connections between FPGA and USB (ISP1362)
Table 4-25 USB (ISP1362) Pin Assignments
Signal Name
FPGA Pin No.
Description
I/O Standard
OTG_ADDR[0]
PIN_H7
ISP1362 Address[0]
3.3V
OTG_ADDR[1]
PIN_C3
ISP1362 Address[1]
3.3V
OTG_DATA[0]
PIN_J6
ISP1362 Data[0]
3.3V
OTG_DATA[1]
PIN_K4
ISP1362 Data[1]
3.3V
OTG_DATA[2]
PIN_J5
ISP1362 Data[2]
3.3V
OTG_DATA[3]
PIN_K3
ISP1362 Data[3]
3.3V
OTG_DATA[4]
PIN_J4
ISP1362 Data[4]
3.3V
OTG_DATA[5]
PIN_J3
ISP1362 Data[5]
3.3V
OTG_DATA[6]
PIN_J7
ISP1362 Data[6]
3.3V
OTG_DATA[7]
PIN_H6
ISP1362 Data[7]
3.3V

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