83
Integrated Circuit Diagrams
TMS320D707RFP/S DSP Pin Function Table
Pin Functions
PIN
SIGNAL NAME TYPE
(1)
PULL
(2)
GPIO
(3)
DESCRIPTION
NO.
External Memory Interface (EMIF) Address and Control
EM_A[0] 91 O - N
EM_A[1] 89 O - N
EM_A[2] 88 O - N
EM_A[3] 86 O - N
EM_A[4] 84 O - N
EM_A[5] 83 O - N
EMIF Address Bus
EM_A[6] 80 O - N
EM_A[7] 79 O - N
EM_A[8] 76 O - N
EM_A[9] 75 O - N
EM_A[10] 93 O - N
EM_A[11] 74 O - N
EM_BA[0] 96 O - N
SDRAM Bank Address and Asynchronous Memory
Low-Order Address
EM_BA[1] 94 O - N
EM_CS[0] 97 O - N SDRAM Chip Select
EM_CS[2]
100 O - N Asynchronous Memory Chip Select
EM_CAS
37 O - N SDRAM Column Address Strobe
EM_RAS
98 O - N SDRAM Row Address Strobe
EM_WE
38 O - N SDRAM Write Enable
EM_CKE 71 O - N SDRAM Clock Enable
EM_CLK 70 O - N SDRAM Clock
EM_WE_DQM[0]
39 O - N Write Enable or Byte Enable for EM_D[7:0]
EM_WE_DQM[1]
67 O - N Write Enable or Byte Enable for EM_D[15:8]
EM_OE
104 O - N SDRAM Output Enable
EM_RW
102 O - N Asynchronous Memory Read/not Write
(1) TYPE column refers to pin direction in functional mode. If a pin has more than one function with different directions, the functions are
separated with a slash (/).
(2) PULL column:
IPD = Internal Pulldown resistor.
IPU = Internal Pullup resistor.
(3) If the GPIO column is 'Y', then in GPIO mode, the pin is configurable as an IO unless otherwise marked.
Notes:
External Memory Interface (EMIF) Data Bus
EM_D[0] 52 IO - N
EM_D[1] 51 IO - N
EM_D[2] 49 IO - N
EM_D[3] 48 IO - N
EM_D[4] 46 IO - N
EM_D[5] 45 IO - N
EM_D[6] 43 IO - N
EM_D[7] 41 IO - N
EMIF Data Bus [Lower 16 Bits]
EM_D[8] 66 IO - N
EM_D[9] 64 IO - N
EM_D[10] 63 IO - N
EM_D[11] 61 IO - N
EM_D[12] 59 IO - N
EM_D[13] 58 IO - N
EM_D[14] 56 IO - N
EM_D[15] 55 IO - N