Bridgetek FT801 - Page 38

FT800 Series Programmer Guide
Version 2.1
Document Reference No.: BRT_000030 Clearance No.: BRT#037
38
Product Page
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Register Definition 9 REG_VSYNC0 Definition
31 9 0
Note: NONE
REG_VSYNC0 Definition
Bit0 - 9: The value of these bits specifies how many lines for the high state of signal VSYNC
takes at the start of new frame.
R/W
Address: 0x102448
Reset Value: 0x000
Register Definition 10 REG_VSIZE Definition
31 10 9 0
Note:
REG_VSIZE Definition
Bit0 - 9: The value of these bits specifies how many lines of pixels in one frame.
R/W
Address: 0x102444
Reset Value: 0x110
Reserved