Bridgetek FT801 - Page 66

FT800 Series Programmer Guide
Version 2.1
Document Reference No.: BRT_000030 Clearance No.: BRT#037
66
Product Page
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Register Definition 50 REG_PLAYBACK_FREQ Definition
31 16 15 0
REG_PLAYBACK_FREQ Definition
Address: 0x1024B0
Reset Value: 0x1F40
Note: Please read the datasheet section "Audio Playback" for more details.
Bit 0 - 15 : These bits specify the sampling fequency of audio playback data.
Units is in Hz.
Reserved
R/O
Register Definition 51 REG_PLAYBACK_READPTR Definition
31 20 19 0
Note: Please read the datasheet section "Audio Playback" for more details.
Bit 0 - 19 : These bits are updated by the FT800 audio engine while playing audio data
from RAM_G. It is the current audio data address which is playing back. The host can
read this register to check if the audio engine has consumed all the audio data.
Reserved
R/O
REG_PLAYBACK_READPTR Definition
Address: 0x1024AC
Reset Value: 0x00000