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FT800 Series Programmer Guide
Version 2.1
Document Reference No.: BRT_000030 Clearance No.: BRT#037
73
Product Page
Document Feedback Copyright © Bridgetek Limited
Register Definition 61 REG_INT_EN Definition
R/W
31 1 0
REG_INT_EN Definition
Address: 0x10249C
Reset Value: 0x0
Note: Please refer to the datasheet section "Interrupts" for the details of this
register.
Reserved
Bit 0 : The host can set this bit to 1 to enable the global interrupt of FT800. To
disable the global interrupt of FT800, the host can set this bit to 0.

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