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FT800 Series Programmer Guide
Version 2.1
Document Reference No.: BRT_000030 Clearance No.: BRT#037
74
Product Page
Document Feedback Copyright © Bridgetek Limited
Register Definition 62 REG_INT_FLAGS Definition
31 8 7 0
Reserved
R/C
REG_INT_FLAGS Definition
Address: 0x102498
Reset Value: 0x00
Note: Please read the datasheet section "Interrupts" for more details.
Bit 0 - 7 : These bits are interrupt flags set by the FT800. The host can read these
bits to determine which interrupt takes place. These bits are cleared
automatically by reading. The host shall not write this register. After reset,
there are no interrupts happen by default , therefore, it is 0x00.
Register Definition 63 REG_GPIO Definition
31 8 7 0
Note: Please read the datasheet section "General Purpose IO pins" for more
details.
Bit 0 - 7 : These bits are versatile. Bit 0 , 1, 7 are used to control GPIO pin values.
Bit 2 - 6 : These are used to configure the drive strength of the pins.
R/W
Reserved
REG_GPIO Definition
Address: 0x102490
Reset Value: 0x00

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