AUDxON DMA on "x" indicates channel number (signal from DMACON).
AUDxIP Audio interrupt pending (input to channel from interrupt
circuitry).
AUDxIR Audio interrupt request (output from channel to interrupt
circuitry)
intreq1 Interrupt request that combines with intreq2 to form AUDxIR
intreq2 Prepare for interrupt request. Request comes out after the
next 011-->010 transition in normal operation.
AUDxDAT Audio data load signal. Loads 16 bits of data to audio channel.
AUDxDR Audio DMA request to Agnus for one word of data.
AUDxDSR Audio DMA request to Agnus to reset pointer to start of block.
dmasen Restart request enable.
percntrld Reload period counter from back-up latch typically written by
processor with AUDxPER (can also be written by attach mode).
percount Count period counter down one latch.
perfin Period counter finished (value = 1).
lencntrld Reload length counter from back-up latch.
lencount Count length counter down one notch.
lenfin Length counter finished (value = 1).
volcntrld Reload volume counter from back-up latch.
pbufld1 Load output buffer from holding latch written to by AUDxDAT.
pbufld2 Like pbufld1, but only during 010-->011 with attach period.
AUDxAV Attach volume. Send data to volume latch of next channel
instead of to D-->A converter.
AUDxAP Attach period. Send data to period latch of next channel
instead of to the DA converter.
penhi Enable the high 8 bits of data to go to the D-->A converter.
- Audio Hardware 161 -
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