TIME OF DAY CLOCK
TOD consists of a 24-bit binary counter. Positive edge transitions on
this pin cause the binary counter to increment. The TOD pin has a passive
pull-up on it.
A programmable alarm is provided for generating an interrupt at a desired
time. The alarm registers are located at the same addresses as the
corresponding TOD registers. Access to the alarm is governed by a control
register bit. The alarm is write-only; any read of a TOD address will
read time regardless of the state of the ALARM access bit.
A specific sequence of events must be followed for proper setting and
reading of TOD. TOD is automatically stopped whenever a write to the
register occurs. The clock will not start again until after a write to
the LSB event register. This assures that TOD will always start at the
desired time.
Since a carry from one stage to the next can occur at any time with
respect to a read operation, a latching function is included to keep all
TOD information constant during a read sequence. All TOD registers latch
on a read of MSB event and remain latched until after a read of LSB
event.
The TOD clock continues to count when the output registers are latched.
If only one register is to be read, there is no carry problem and the
register can be read "on the fly" provided that any read of MSB event is
followed by a read of LSB Event to disable the latching.
BIT NAMES for WRITE TIME/ALARM or READ TIME
REG NAME
--- ----
8 LSB Event E7 E6 E5 E4 E3 E2 E1 E0
9 Event 8-15 E15 E14 E13 E12 E11 E10 E9 E8
A MSB Event E23 E22 E21 E20 E19 E18 E17 E16
WRITE
CRB7 = 0
CRB7 = 1 ALARM
- Appendix F 323 -
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