POTENTIOMETER SPECIFICATIONS
The resistance of the potentiometers should be a linear taper. Based on the design of the
integrating analog-to-digital converter used, the maximum resistance should be no more
than 528K (470K +/- 10 percent is suggested) for either the X or Y pots. This is based on
a charge capacitor of 0.047uf, +/- 10 percent, and a maximum time of 16.6 milliseconds
for charge to full value, i.e. one video frame time.
All potentiometers exhibit a certain amount of "jitter". For acceptable results on a wide
base of configurations, several input readings will need to be averaged.
Port 1 connector
___________________ ________________________
\ o o o o o / | POT1Y | POT1X | POT1DAT
\ o o o o / | COUNTER | COUNTER | DFF014
\__________/\_/ |____________|___________| Read only
/ \ |
+5 / \ |\ |
| / \______________| \____|
/ / | | | /
Max=470k \ / | | |/
+/-10% /__/ __|__ |
\ 47nf_____ |__________o______
/ | _____|_ |
\ \|/ | | | __|__
| V ^ | |__\ /
OPEN /_\ | \ /
| ^ V
o____/ \ |
| /___\ |
KEY: | | |
a= OUTRY | | | POTGO
b= DATRY | o------| DFF034
c= OUTRX | | Write only
d= DATRX __|_____|____________________________
e= OUTLY | | | | | | | | | | |
f= DATLY | a | b |c |d |e |f |g |h |xxxxxx|i |
g= OUTLX |____|____|__|__|__|__|__|__||||||||__|
h= DATLX BIT 15 . . . . BIT 0
i= START . . . .
_______._____._____._____.___________
| | | | | | | | | |
| 0 | RY |0 |RX|0 |LY|0 |LX| 0 |
|____|____|__|__|__|__|__|__|_________|
14 POTINP
POT COUNTER DFF016
Read only
Figure 8-6: Potentiometer Charging Circuit
- Interface Hardware 231 -