Table 8-8: ADKCON and ADKCONR Register
Bit
Number Name Function
15 SET/CLR Control bit that allows setting or clearing of individual
bits without affecting the rest of the register.
If bit 15 is a 1, the specified bits are set.
If bit 15 is a 0, the specified bits are cleared.
14 PRECOMP1 MSB of Precompensation specifier
13 PRECOMP0 LSB of Precompensation specifier
Value of 00 selects none.
Value of 01 selects 140 ns.
Value of 10 selects 280 ns.
Value of 11 selects 560 ns.
12 MFMPREC Value of 0 selects GCR Precompensation.
Value of 1 selects MFM Precompensation.
10 WORDSYNC Value of 1 enables synchronizing and starting
of DMA on disk read of a word. The word on which
to synchronize must be written into the DSKSYNC
address ($DFF07E). This capability is highly
useful.
9 MSBSYNC Value of 1 enables sync on most significant bit of the
input (usually used for GCR).
8 FAST Value of 1 selects two microseconds per bit cell
(usually MFM). Data must be valid raw MFM.
0 selects four microseconds per bit (usually GCR).
- Interface Hardware 243 -
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