AUDxLCH 0A0 W A Audio channel x location (high 3 bits)
AUDxLCL 0A2 W A Audio channel x location (low 15 bits)
This pair of registers contains the 18 bit starting address (location) of
audio channel x (x=0,1,2,3) DMA data. This is not a pointer register and
therefore needs to be reloaded only if a different memory location is to
be outputted.
AUDxLEN 0A4 W P Audio channel x length
This register contains the length (number of words) of audio channel x DMA
data.
AUDxPER 0A6 W P Audio channel x Period
This register contains the period (rate) of audio channel x DMA data
transfer. The minimum period is 12 color clocks. This means that the
smallest number that should be placed in this register is 124 decimal.
This corresponds to a maximum sample frequency of 28.86 kHz.
AUDxVOL 0A8 W P Audio channel x volume
This register contains the volume setting for audio channel x. Bits
6,5,4,3,2,1,0 specify 65 linear volume levels as shown below.
Bit# Use
--------------------------------------------------
15-07 Not used
06 Forces volume to max (64 ones, no zeros)
05-00 Sets one of 64 levels (000000-no output (111111-63 19, one 0)
BLTAFWM 044 W A Blitter first-word mask for source A
BLTALWM 046 W A Blitter last-word mask for source A
The patterns in these two registers are ANDed with the first and last
words of each line of data from source A into the blitter. A zero in any
bit override data from source A. These registers should be set to all 1's
for fill mode or for line-drawing mode.
- 260 Appendix A -
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