BPLCON0 100 W A D Bit plane control register (misc.
control bits)
BPLCON1 102 W D Bit plane control register
(horizontal scroll control)
BPLCON2 104 W D Bit Plane control register
(video priority control)
These registers control the operation of the
bit planes and various aspects of the display.
BIT# BPLCON0 BPLCON1 BPLCON2
15 HIRES X X
14 BPU2 X X
13 BPU1 X X
12 BPU0 X X
11 HOMOD X X
10 DBLPF X X
09 COLOR X X
08 GAUD X X
07 X PF2H3 X
06 X PF2H2 PF2PRI
05 X PF2H1 PF2P2
04 X PF2H0 PF2P1
03 LPEN PF1H3 PF2P0
02 LACE PF1H2 PF1P2
01 ERSY PF1H1 PF1P1
00 X PF1H0 PF1lP0
HIRES =High-resolution (640) mode
BPU =Bit plane use code 000-110 (NONE through 6 inclusive)
HOMOD =Hold-and-modify mode
DBLPF =Double playfield (PF1=odd PF2=even bit planes)
COLOR =Composite video COLOR enable
GAUD =Genlock audio enable (muxed on BKGND pin during vertical blanking
LPEN =Lightpen enable (reset on power up)
LACE =Interlace enable (reset on power up)
ERSY =External resync (HSYNC, VSYNC pads become inputs) (reset on power
up)
PF2PRI=Playfield 2 (even planes) has priority over (appears in front of)
playfield 1 (odd planes).
PF2P =Playfield 2 priority code (with respect to sprites)
PF1P =Playfield 1 priority code (with respect to sprites)
PF2H =Playfield 2 horizontal scroll code
PFlH =Playfield 1 horizontal scroll code
- Appendix A 265 -
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