DSKDAT 026 W P Disk DMA data write
DSKDATR 008 ER P Disk DMA data read (early read dummy
address )
This register is the disk DMA data buffer. It
contains two bytes of data that are either sent
(written) to or received (read) from the disk.
The write mode is enabled by bit 14 of the LENGTH
register. The DMA controller automatically
transfer data to or from this register and RAM,
and when the DMA data is finished (length=0) it
causes a disk block interrupt. See interrupts below.
DSKLEN 024 W P Disk length
This register contains the length (number of words)
of disk DMA data. It also contains two control
bits, a DMA enable bit, and a DMA
direction (read/write) bit.
BIT# FUNCTION DESRIPTION
-------------------------------------------------
15 DMAEN Disk DMA enable
14 WRITE Disk write (RAM to disk) if 1
13-0 LENGTH Length (# of words) of DMA data.
DSKPTH 020 W A Disk pointer (high 3 bits)
DSKPTL 022 W A Disk pointer (low 15 bits)
This pair of registers contains the 18-bit
address of disk DMA data. These address registers
must be initialized by the processor or Copper
before disk DMA is enabled.
DSKSYNC 07E W P Disk sync register
hold the match code for disk read synchronization.
See ADKCON bit 10.
- Appendix A 273 -
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