Commodore Amiga A2000 - Page 312

PARALLEL CONNECTOR INTERFACE TIMING, OUTPUT CYCLE
PA<7:0>_____ ____________________________________________ ____
PB<7:0>_____X____________________________________________X____
|<-- T1 --->| |
| |<--------- T2 -------->|
DRDY* _________________V V____________________________
Output data ready |________|
|<- T3 ->|
|<--- T4 ---->|
ACK* ________________________________|<- T5 -->|_____________
Output data acknowledge | |
Microseconds
Min Typ Max
--- --- ---
T1: 4.3 -x- 5.3 Output data setup to ready delay.
T2: nsp -x- upc Output data hold time.
T3: nsp 1.4 nsp Output data ready width.
T4: 0 -x- upc Ready to acknowledge delay.
TS: nsp -x- upc Acknowledge width.
nsp - not specified
upc - under program control
PARALLEL CONNECTOR INTERFACE TIMING, INPUT CYCLE
PA<7:0>_____ ____________________________________________ ____
PB<7:0>_____X____________________________________________X____
|<-- T1 --->|
| T2 -->|<------>|
DRDY* _________________V ______________|_____________
input data ready |________| |
|<- T3 ->| |
|<--- T4 ---->|
ACK* ________________________________|<- T5 -->|_____________
input data acknowledge | |
Microseconds
Min Typ Max
--- --- ---
T1: 0 -x- upc Input data setup time.
T2: nsp -x- upc Input data hold time.
T3: nsp -x- upc Input data ready width.
T4: upc -x- upc Input data ready to data
acknowledge delay.
TS: nsp 1.4 nsp Input data acknowledge width.
nsp=not specified
upc=under program control
- Appendix E 303 -