RSRS0 - ADDRESS INPUTS
The address inputs select the internal registers as described by the
register map.
DB7-DB0 - DATA BUS INPUTS/OUTPUTS
The eight data bus output pins transfer information between the 8520 and
the system data bus. These pins are high impedance inputs unless CS is
low and R/W and 02 are high, to read the device. During this read, the
data bus output buffers are enabled, driving the data from the selected
register onto the system data bus.
IRQ - INTERRUPT REQUEST OUTPUT
IRQ is an open drain output normally connected to the processor interrupt
input. An external pull-up resistor holds the signal high, allowing
multiple IRQ outputs to be connected together.
The IRQ output is normally off (high impedance) and is activated low as
indicated in the functional description.
RES - RESET INPUT
A low on the RES pin resets all internal registers. The port pins are set
as inputs and port registers to zero (although a read of the ports will
return all highs because of passive pull-ups). The timer control registers
are set to zero and the timer latches to all ones. All other registers
are reset to zero.
- Appendix F 333 –
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