Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 - Page 142

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGS
A-126 EPSON S1C33L03 PRODUCT PART
SRAM: 70ns, CPU: 25/20MHz, read cycle
BCLK
A[23:0]
#CEx
#RD
D[15:0]
RD data
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SRAM: 70ns, CPU: 25/20MHz, write cycle
BCLK
A[23:0]
#CEx
#WR
D[15:0]
WR data
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