Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 - Cpu and Operating Mode; Cpu

II CORE BLOCK: CPU AND OPERATING MODE
S1C33L03 FUNCTION PART EPSON B-II-2-1
A-1
B-II
CPU
II-2 CPU AND OPERATING MODE
CPU
The C33 Core Block employs the S1C33000 32-bit RISC type CPU as the core CPU. Since it has a built-in
multiplier, all instructions (105 instructions) in the S1C33000 instruction set including the MAC (multiplication
and accumulation) instruction and the multiplication/division instructions are available.
All the internal registers of the S1C33000 can be used. The CPU registers and CPU address bus can handle 28-bit
addresses. However, the core block has a 24-bit external address bus (A[0:23]), so the low-order 24 bits of address
data can only be delivered to the external address bus and the internal address bus which is connected to the User
Logic Block.
Refer to the "S1C33000 Core CPU Manual" for details of the S1C33000.