Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 - Page 578

VII LCD CONTROLLER BLOCK: LCD CONTROLLER
B-VII-2-44 EPSON S1C33L03 FUNCTION PART
ld.b [%r1], %r2
xld.w %r1, 0x39ffea ; set Vertical Non-displayed Period
xld.w %r2, 0x01
ld.b [%r1], %r2
xld.w %r1, 0x39ffec ; set S1 start address aaaa
xld.w %r2, 0x0000
ld.h [%r1], %r2
xld.w %r1, 0x39ffee ; set S2 start address 5555
xld.w %r2, 0x0000
ld.h [%r1], %r2
xld.w %r1, 0x39fff1 ; set Memory address offset 00
xld.w %r2, 0x00
ld.b [%r1], %r2
xld.w %r1, 0x39fff2 ; set S1 Vertical size 0x01df lsb
xld.w %r2, 0x0100
ld.h [%r1], %r2
xld.w %r1, 0x39fff4 ; set clk ->osc3 , fifo ->0
xld.w %r2, 0x04
ld.b [%r1], %r2
;-----------------------------------
xld.w %r1, 0x39ffe3 ; LCD power on
xld.w %r2, 0x23
ld.b [%r1], %r2
;******************************************************
;** Initialize the LUT
;******************************************************
xld.w %r1, 0x39fff5 ; set lut address
xld.w %r2, 0x39fff7
xld.w %r3, 0x00
ld.b [%r1], %r3
ld.b [%r2], %r3
ld.b [%r2], %r3
ld.b [%r2], %r3