Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 - Page 98

8 ELECTRICAL CHARACTERISTICS
A-82 EPSON S1C33L03 PRODUCT PART
DRAM access cycle common characteristics
1) 3.3 V/5.0 V dual power source
(Unless otherwise specified: VDDE=5.0V±0.5V, VDD=2.7V to 3.6V, VSS=0V, Ta=-40°C to +85°C)
Item Symbol Min. Max. Unit ∗
#RAS signal delay time (1) tRASD1 10 ns
#RAS signal delay time (2) tRASD2 10 ns
#RAS signal pulse width tRASW tCYC(2+WC)-10 ns
#CAS signal delay time (1) tCASD1 10 ns
#CAS signal delay time (2) tCASD2 10 ns
#CAS signal pulse width tCASW tCYC(0.5+WC)-5 ns
Read signal delay time (3) tRDD3 10 ns
Read signal pulse width (2) tRDW2 tCYC(2+WC)-10 ns
Write signal delay time (3) tWRD3 10 ns
Write signal pulse width (2) tWRW2 tCYC(2+WC)-10 ns
2) 3.3 V single power source
(Unless otherwise specified: VDDE=VDD=2.7V to 3.6V, VSS=0V, Ta=-40°C to +85°C)
Item Symbol Min. Max. Unit ∗
#RAS signal delay time (1) tRASD1 10 ns
#RAS signal delay time (2) tRASD2 10 ns
#RAS signal pulse width tRASW tCYC(2+WC)-10 ns
#CAS signal delay time (1) tCASD1 10 ns
#CAS signal delay time (2) tCASD2 10 ns
#CAS signal pulse width tCASW tCYC(0.5+WC)-10 ns
Read signal delay time (3) tRDD3 10 ns
Read signal pulse width (2) tRDW2 tCYC(2+WC)-10 ns
Write signal delay time (3) tWRD3 10 ns
Write signal pulse width (2) tWRW2 tCYC(2+WC)-10 ns
3) 2.0 V single power source
(Unless otherwise specified: VDDE=VDD=2.0V±0.2V, VSS=0V, Ta=-40°C to +85°C)
Item Symbol Min. Max. Unit ∗
#RAS signal delay time (1) tRASD1 20 ns
#RAS signal delay time (2) tRASD2 20 ns
#RAS signal pulse width tRASW tCYC(2+WC)-20 ns
#CAS signal delay time (1) tCASD1 20 ns
#CAS signal delay time (2) tCASD2 20 ns
#CAS signal pulse width tCASW tCYC(0.5+WC)-20 ns
Read signal delay time (3) tRDD3 20 ns
Read signal pulse width (2) tRDW2 tCYC(2+WC)-20 ns
Write signal delay time (3) tWRD3 20 ns
Write signal pulse width (2) tWRW2 tCYC(2+WC)-20 ns