8-8 B90 LOW IMPEDANCE BUS DIFFERENTIAL SYSTEM – INSTRUCTION MANUAL
SLOPES AND HIGH SET THRESHOLD CHAPTER 8: APPLICATION OF SETTINGS
8
Figure 8-5: Determining CT time-to-saturate
CT time-to-saturate (t
SAT
) is determined as a projection of the intersection of the K
s
CT saturation capability curve and
K
S_LIM
CT limiting factor, as shown in the figure.
Practically, CT time-to-saturate can be obtained by either of the following methods:
• Method 1 — Download the "CT Time-to-Saturate Estimator.xlsm" spreadsheet from the GE Multilin web site, located
under Support > Support Documents > B90 Low Impedance Bus Differential System. Enter the required system and CT
parameters to obtain the CT time-to-saturate.
•Method 2
– Define several time instances t
1
, t
2
...t
n
– Use equation 8-5 to calculate the corresponding K
S1
, K
S2
…K
Sn
–Calculate K
S_LIM
using equation 8-7
– Compare each K
S
value with K
S_LIM
. If K
S
at the given time instance t
i
is less than K
S_LIM
, it means that true t
SAT
is
greater than t
i
, otherwise it is less than t
i
Columns 6 and 7 of the table below summarize the DC saturation threat for the fault on C-1. CT-4, CT-6, CT-7, and CT-8 can
saturate due to the DC components and can generate spurious differential signal for both the North and South bus relays
depending on the bus configuration. The saturation does not occur before 5.02 ms and is detected by the Saturation
Detector.
The transient saturation of the CTs due to the DC component can be neglected when setting the slopes of the
characteristic as the saturation is detected and the relay uses the current directional principle. It must, however, be taken
into account when setting the high set (unbiased) differential element.
Table 8-4: External fault calculations on C-1
CT I
FAULT
(kA) I
FAULT
(A sec) T
DC
(ms) AC saturation DC saturation t
SAT
(ms)
CT-1 14.0 116.67 40 Yes Yes 5.02
CT-2 0 0.00 N/A No No N/A
CT-3 6.0 25.00 5 No No N/A
CT-4 5.0 25.00 30 No Yes 26.37
CT-6 3.0 15.00 40 No Yes 61.50
CT-7, CT-8 14.0 58.33 40 No Yes 9.44