3-40 B90 LOW IMPEDANCE BUS DIFFERENTIAL SYSTEM – INSTRUCTION MANUAL
DIRECT INPUT AND OUTPUT COMMUNICATIONS CHAPTER 3: INSTALLATION
3
Figure 3-44: Clock and data transitions
3.4.5.4 Receive timing
The RS422 interface utilizes NRZI-MARK modulation code and therefore does not rely on an Rx clock to recapture data.
NRZI-MARK is an edge-type, invertible, self-clocking code.
To recover the Rx clock from the data-stream, an integrated digital phase lock loop (DPLL) circuit is utilized. The DPLL is
driven by an internal clock, which is 16-times over-sampled, and uses this clock along with the data-stream to generate a
data clock that can be used as the serial communication controller (SCC) receive clock.
3.4.6 RS422 and fiber interface
The following figure shows the combined RS422 plus fiberoptic interface configuration at 64 K baud. The 7L, 7M, 7N, 7P,
and 74 modules are used in two-terminal with a redundant channel or three-terminal configurations where channel 1 is
employed via the RS422 interface (possibly with a multiplexer) and channel 2 via direct fiber.
AWG 20-24 twisted shielded pair is recommended for external RS422 connections and ground the shield only at one end.
For the direct fiber channel, address power budget issues properly.
Figure 3-45: RS422 and fiber interface connection
When using a laser interface, attenuators can be necessary to ensure that you do not exceed
maximum optical input power to the receiver.
To Next Page
Loading...
Need help?
General
