Section VI
1-A-3-1
6-20
{}
D
HIGH LEVEL
SENSITIVE
ACTIVE PERIOD
-{
}-
u
LOW
LEVEL
SENSITIVE ACTIVE PERIOD
-f
Jt
LOW
TO HIGH
EDGE SENSITIVE
ACTIVE PERIOD
-i
jl
HIGH TO
LOW
EDGE SENSITIVE
ACTIVE PERIOD
OUTPUT DELAY
INHIBIT INPUT
-+C
INHIBIT INPUT
INDICATOR SYMBOLS
ACTIVE HIGH inputs and
outputs
are indicated by
the
absence
of
the
polarity indicator lb. I
or
negation symbol
lo).
ACTIVE
LOW
inputs and
outputs
are indicated by
the
presence
of
the
polarity indicator (
b.
I
or
negation symbol
(o).
EDGE SENSITIVE (Dynamic) inputs are indicated
by
the
presence
of
the
dynamic indicator symbol I
)I.
The
output
changes
state
only after
the
referenced
input
Im) returns
to
its inactive state.
Im
is
replaced
by appropriate dependency symbol.)
An active high state
input
prevents
the
output
of
that
element from being active.
·An active low
state
input
prevents
the
output
of
that
element from being active.
OPEN COLLECTOR
OR
EMITTER OUTPUT
This
output
requires some external components
to
achieve logic state.
Figure
6-23.
ANSI
Y32.14 Logic Symbols (Sheet 1
of6)
Model 7475A
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