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Principles of Operation
DRAM
System DRAM is used for program variables, image buffers, and input
buffers. All DRAM supports page mode operation and is addressable by
individual byte.
Two standard 72-pin DRAM SIMMs are used for expansion memory. The DC,
through the VX ASIC, may address up to 32MB of DRAM in four banks.
NVRAM
A 8K x 8 bit Non-Volatile battery-backed static RAM (NVRAM) device
provides for the storage of configuration and system statistical data.
VX ASIC
The VX is a multifunction custom gate array ASIC containing all the logic for
the DC that is not contained in the 68EC030 processor. The VX provides the
following services:
♦ Memory Access Controller
♦ DRAM Controller
♦ Flash Controller
♦ Two DMA Channels
♦ Operator Panel Interface
♦ “Dot Plucking” and Adjacent Dot Checking
♦ “Cajun” Bus Interface
♦ Host I/O and Diagnostic Port
Memory Access Controller All 030 addresses go through the VX ASIC. The
VX handles all address decoding, chip selects, DTACKs, and so on.
DRAM Controller The VX supports up to four banks of page mode DRAM.
FLASH Controller The VX supports up to four banks of flash memory.
DMA Channels The VX provides two channels for direct memory access.
These channels move data from the host interface or expansion bus to the
DRAM and vice versa. One address is an I/O address, the other is a memory
address with auto-increment.
Operator Panel Interface The VX operator panel interface consists of five
lines: serial clock, serial data, and three select lines. It is the VX that handles
all parallel-to-serial (and vice versa) conversion to and from the panel, as
well as any special timing needed when toggling select lines, etc.
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