Infineon TRAVEO T2G family CYT4D Series - Page 63

Application Note 63 of 80 002-26071 Rev. *B
2021-09-07
Clock configuration setup in TRAVEO™ T2G family CYT4D series MCUs
Configuring the internal clock
Code Listing 52 AllClockConfiguration() function
static void AllClockConfiguration(void)
{
:
/***** LPECO prescaler setting ******/
{
cy_en_sysclk_status_t lpecoPreStatus;
lpecoPreStatus = Cy_SysClk_ClkBak_LPECO_SetPrescale(CLK_FREQ_LPECO, LPECO_PRESCALER_TARGET_FREQ);
CY_ASSERT(lpecoPreStatus == CY_SYSCLK_SUCCESS);
lpecoPreStatus = Cy_SysClk_ClkBak_LPECO_PrescaleEnable(WAIT_FOR_STABILIZATION);
CY_ASSERT(lpecoPreStatus == CY_SYSCLK_SUCCESS);
}
:
return;
}
Code Listing 53 Cy_SysClk_ClkBak_LPECO_SetPrescale () function
__STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_ClkBak_LPECO_SetPrescale(uint32_t lpecoFreq, uint32_t targetFreq)
{
// Frequency of LPECO (4MHz ~ 8MHz) might exceed 32-bit value if shifted 8 bit.
// So, it uses 64-bit data for fixed-point operation.
// Lowest 8 bits are fractional value. Next 10 bits are integer value.
uint64_t fixedPointLPEcoFreq = ((uint64_t)lpecoFreq << 8ull);
uint64_t fixedPointDivNum64;
uint32_t fixedPointDivNum;
// Culculate the divider number
fixedPointDivNum64 = fixedPointLPEcoFreq / (uint64_t)targetFreq;
// Dividing number should be larger than 1.0, and smaller than maximum of 10-bit number.
if((fixedPointDivNum64 < 0x100ull) && (fixedPointDivNum64 > 0x40000ull))
{
return CY_SYSCLK_BAD_PARAM;
}
fixedPointDivNum = (uint32_t)fixedPointDivNum64;
Cy_SysClk_ClkBak_LPECO_SetPrescaleManual(
(((fixedPointDivNum & 0x0003FF00ul) >> 8ul) - 1ul),
(fixedPointDivNum & 0x000000FFul)
);
return CY_SYSCLK_SUCCESS;
}
Code Listing 54 Cy_SysClk_ClkBak_LPECO_SetPrescaleManual() function
__STATIC_INLINE void Cy_SysClk_ClkBak_LPECO_SetPrescaleManual(uint16_t intDiv, uint8_t fracDiv)
{
if(BACKUP->unLPECO_PRESCALE.stcField.u1LPECO_DIV_ENABLED == 0)
{
BACKUP->unLPECO_PRESCALE.stcField.u8LPECO_FRAC_DIV = fracDiv;
BACKUP->unLPECO_PRESCALE.stcField.u10LPECO_INT_DIV = intDiv;
}
}
Code Listing 55 Cy_SysClk_ClkBak_LPECO_PrescaleEnable() function
__STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_ClkBak_LPECO_PrescaleEnable(uint32_t timeoutus)
{
// Send enable command
BACKUP->unLPECO_CTL.stcField.u1LPECO_DIV_ENABLE = 1ul;
// Wait for eco prescaler to get enabled
while(CY_SYSCLK_ECO_PRESCALE_ENABLE != Cy_SysClk_ClkBak_LPECO_PrescalarOkay())
{
if(0ul == timeoutus)
{
LPECO prescaler setting. See Code Listing 53.
LPECO prescaler enable. See Code Listing 54.
Configure the LPECO prescaler. See Code Listing 54.
(1) Configure the 8-bit fractional value and 10-bit
integer value.
(3) Wait until the LPECO prescaler is
available.
(2) Enable the LPECO prescaler.