Intel Agilex 7 FPGA I-Series - Page 48

Table 18. QSFP Connector-0 (12B/J57)
Schematic Signal Names Description
QSFP0_MOD_PRS_N
Module present
QSFP0_RST
Module reset
QSFP0_MOD_SEL_L
Mode select
QSFP0_LP_MODE
Initial mode
QSFP0_INTERRUPT_N
Interrupt
I2C_QSFP_1_SCL
I
2
C clock
I2C_QSFP_1_SDA
I
2
C data
QSFP0_TX_[0:3]_DP/DN
Transceiver TX
QSFP0_RX_[0:3]_DP/DN
Transceiver RX
Table 19. QSFP Connector-1 (12C/J58)
Schematic Signal Names Description
QSFP1_MOD_PRS_N
Module present
QSFP1_RST
Module reset
QSFP1_MOD_SEL_L
Mode select
QSFP1_LP_MODE
Initial mode
QSFP1_INTERRUPT_N
Interrupt
I2C_QSFP_3_SCL
I
2
C clock
I2C_QSFP_3_SDA
I
2
C data
QSFP1_TX_[0:3]_DP/DN
Transceiver TX
QSFP1_RX_[0:3]_DP/DN
Transceiver RX
Table 20. QSFP Connector-2 (13A/J66)
Schematic Signal Names Description
QSFP2_MOD_PRS_N
Module present
QSFP2_RST
Module reset
QSFP2_MOD_SEL_L
Mode select
QSFP2_LP_MODE
Initial mode
QSFP2_INTERRUPT_N
Interrupt
I2C_QSFP_2_SCL
I
2
C clock
I2C_QSFP_2_SDA
I
2
C data
QSFP2_TX_[0:3]_DP/DN
Transceiver TX
QSFP2_RX_[0:3]_DP/DN
Transceiver RX
OSFP
A. Development Kit Components
776646 | 2023.05.31
Intel Agilex
®
7 FPGA I-Series Transceiver (6 × F-Tile) Development Kit User
Guide
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