Intel Xeon E5-2600 Series - Page 126

Intel® Xeon® Processor E5-2600 Product Family Uncore Performance Monitoring
126 Reference Number: 327043-001
RxR_BYPASSED
• Title: Ingress Bypassed
• Category: INGRESS Events
• Event Code: 0x12
• Max. Inc/Cyc: 1, Register Restrictions: 0-1
• Definition: Counts the number of times when the Ingress was bypassed and an incoming transac-
tion was bypassed directly across the BGF and into the qfclk domain.
RxR_CYCLES_NE
• Title: Ingress Cycles Not Empty
• Category: INGRESS Events
• Event Code: 0x10
• Max. Inc/Cyc: 1, Register Restrictions: 0-1
• Definition: Counts the number of cycles when the Intel® QPI Ingress is not empty. This tracks
one of the three rings that are used by the Intel® QPI agent. This can be used in conjunction with
the Intel® QPI Ingress Occupancy Accumulator event in order to calculate average queue occu-
pancy. Multiple ingress buffers can be tracked at a given time using multiple counters.
RxR_INSERTS
• Title: Ingress Allocations
• Category: INGRESS Events
• Event Code: 0x11
• Max. Inc/Cyc: 1, Register Restrictions: 0-1
Table 2-130. Unit Masks for RING_IV_USED
Extension
umask
[15:8]
Description
ANY b00001111 Any:
Filters any polarity
Table 2-131. Unit Masks for RxR_BYPASSED
Extension
umask
[15:8]
Description
AD bxxxxxxx1
Table 2-132. Unit Masks for RxR_CYCLES_NE
Extension
umask
[15:8]
Description
HOM bxxxxxxx1 HOM:
HOM Ingress Queue
SNP bxxxxxx1x SNP:
SNP Ingress Queue
NDR bxxxxx1xx NDR:
NDR Ingress Queue
DRS bxxxx1xxx DRS:
DRS Ingress Queue
NCB bxxx1xxxx NCB:
NCB Ingress Queue
NCS bxx1xxxxx NCS:
NCS Ingress Queue