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Intel Xeon E5-2600 Series - Cn_Msr_Pmon_Box_Filter Register - Field Definitions

Intel Xeon E5-2600 Series
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Reference Number: 327043-001 29
Intel® Xeon® Processor E5-2600 Product Family Uncore Performance Monitoring
Note: Not all transactions can be associated with a specific thread. For example, when a
snoop triggers a WB, it does not have an associated thread. Transactions that are
associated with PCIe will come from “0x1E” (b11110).
Note: Only one of these filtering criteria may be applied at a time.
Refer to Table 2-144, “Opcodes (Alphabetical Listing)” for definitions of the opcodes found in the
following table.
Table 2-12. Cn_MSR_PMON_BOX_FILTER Register – Field Definitions
Field Bits Atrtr
HW
Reset
Val
Description
opc
(7b IDI Opcode?
w/top 2b 0x3)
31:23 RW 0 Match on Opcode (see
Table 2-13, “Opcode Match by
IDI Packet Type for
Cn_MSR_PMON_BOX_FILTER.opc”)
NOTE: Only tracks opcodes that come from the IRQ. It is not
possible to track snoops (from IPQ) or other transactions from
the ISMQ.
state 22:18 RW 0 Select state to monitor for LLC_LOOKUP event. Setting multiple
bits in this field will allow a user to track multiple states.
b1xxxx - ‘F’ state.
bx1xxx - ‘M’ state
bxx1xx - ‘E’ state.
bxxx1x - ‘S’ state.
bxxxx1 - ‘I’ state.
nid 17:10 0 0 Match on Target NodeID.
NID is a mask filter with each bit representing a different Node in
the system. 0x01 would filter on NID 0, 0x2 would filter on NID
1, etc
rsv 9:8 RV 0 Reserved (?)
rsv 7:5 RV 0 Reserved (?)
tid 4:0 0 0 [3:1] Core-ID
[0] Thread 1/0
When .tid_en is 0; the specified counter will count ALL events
Thread-ID 0xF is reserved for non-associated requests such as: -
LLC victims - PMSeq - External Snoops
Table 2-13. Opcode Match by IDI Packet Type for Cn_MSR_PMON_BOX_FILTER.opc (Sheet
1 of 2)
opc
Value
Opcode Defn
0x180 RFO Demand Data RFO
0x181 CRd Demand Code Read
0x182 DRd Demand Data Read
0x187 PRd Partial Reads (UC)
0x18C WCiLF Streaming Store - Full
0x18D WCiL Streaming Store - Partial
0x190 PrefRFO Prefetch RFO into LLC but don’t pass to L2. Includes Hints
0x191 PrefCode Prefetch Code into LLC but don’t pass to L2. Includes Hints
0x192 PrefData Prefetch Data into LLC but don’t pass to L2. Includes Hints

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