Intel Xeon E5-2600 Series - Page 33

Reference Number: 327043-001 33
Intel® Xeon® Processor E5-2600 Product Family Uncore Performance Monitoring
AVG_TOR_DRD_REM_MISS_LATENCY:
Average Latency of Data Reads through the
TOR that miss the LLC and were satsified by a
Remote cache or Remote Memory. Only valid
at processor level == don't add counts across
Cbos.
(TOR_OCCUPANCY.MISS_OPCODE /
TOR_INSERTS.MISS_OPCODE)
with:Cn_MSR_PMON_BOX_FILTER.{opc,nid}={0x182,other_no
des}
CYC_INGRESS_BLOCKED:
Cycles the Ingress Request Queue arbiter
was Blocked
RxR_EXT_STARVED.IRQ / SAMPLE_INTERVAL
CYC_INGRESS_STARVED:
Cycles the Ingress Request Queue was in
Internal Starvation
RxR_INT_STARVED.IRQ / SAMPLE_INTERVAL
CYC_USED_DNEVEN:
Cycles Used in the Down direction, Even
polarity
RING_BL_USED.DN_EVEN / SAMPLE_INTERVAL
CYC_USED_DNODD:
Cycles Used in the Down direction, Odd
polarity
RING_BL_USED.DN_ODD / SAMPLE_INTERVAL
CYC_USED_UPEVEN:
Cycles Used in the Up direction, Even
polarity
RING_BL_USED.UP_EVEN / SAMPLE_INTERVAL
CYC_USED_UPODD:
Cycles Used in the Up direction, Odd
polarity
RING_BL_USED.UP_ODD / SAMPLE_INTERVAL
INGRESS_REJ_V_INS:
Ratio of Ingress Request Entries that were
rejected vs. inserted
RxR_INSERTS.IRQ_REJECTED / RxR_INSERTS.IRQ
LLC_DRD_MISS_PCT:
LLC Data Read miss ratio
LLC_LOOKUP.DATA_READ
(Cn_MSR_PMON_BOX_FILTER.state=0x1) /
LLC_LOOKUP.DATA_READ
(Cn_MSR_PMON_BOX_FILTER.state=0x1F)
LLC_DRD_RFO_MISS_TO_LOC_MEM:
LLC Data Read and RFO misses satisfied by
locally HOMed memory. Only valid at
processor level == don't add counts across
Cbos. NOTE: Count imperfect. Will be
polluted by remote hits where memory's
home node is local memory.
(TOR_INSERTS.NID_MISS_OPCODE
with:Cn_MSR_PMON_BOX_FILTER.{opc,nid}={0x182,my_node
} + TOR_INSERTS.NID_MISS_OPCODE
with:Cn_MSR_PMON_BOX_FILTER.{opc,nid}={0x180,my_node
} ) / (TOR_INSERTS.NID_MISS_OPCODE
with:Cn_MSR_PMON_BOX_FILTER.{opc,nid}={0x182,0xF} +
TOR_INSERTS.NID_MISS_OPCODE
with:Cn_MSR_PMON_BOX_FILTER.{opc,nid}={0x180,0xF} )
LLC_DRD_RFO_MISS_TO_REM_MEM:
LLC Data Read and RFO misses satisfied by
a remote cache or remote memory. Only
valid at processor level == don't add counts
across Cbos.
(TOR_INSERTS.NID_MISS_OPCODE
with:Cn_MSR_PMON_BOX_FILTER.{opc,nid}={0x182,other_no
des} + TOR_INSERTS.NID_MISS_OPCODE
with:Cn_MSR_PMON_BOX_FILTER.{opc,nid}={0x180,other_no
des} ) / (TOR_INSERTS.NID_MISS_OPCODE
with:Cn_MSR_PMON_BOX_FILTER.{opc,nid}={0x182,0xF} +
TOR_INSERTS.NID_MISS_OPCODE
with:Cn_MSR_PMON_BOX_FILTER.{opc,nid}={0x180,0xF} )
LLC_MPI:
LLC Misses Per Instruction (code, read, RFO
and prefetches)
LLC_LOOKUP.ANY (Cn_MSR_PMON_BOX_FILTER.state=0x1) /
INST_RETIRED.ALL (on Core)
LLC_PCIE_DATA_BYTES:
LLC Miss Data from PCIe in Number of
Bytes
TOR_INSERTS.OPCODE
with:Cn_MSR_PMON_BOX_FILTER.opc=0x19C * 64
LLC_RFO_MISS_PCT:
LLC RFO Miss Ratio
(TOR_INSERTS.MISS_OPCODE / TOR_INSERTS.OPCODE)
with:Cn_MSR_PMON_BOX_FILTER.opc=0x180
MEM_WB_BYTES:
Data written back to memory in Number of
Bytes
LLC_VICTIMS.M_STATE * 64
Table 2-15. Metrics Derived from CBO Events (Sheet 2 of 3)
Symbol Name:
Definition
Equation