Intel Xeon E5-2600 Series - Page 93

Reference Number: 327043-001 93
Intel® Xeon® Processor E5-2600 Product Family Uncore Performance Monitoring
Table 2-92. Message Events Derived from the Match/Mask filters (Sheet 1 of 2)
Field
Match
[12:0]
Mask
[12:0]
Description
DRS.AnyDataC 0x1C00 0x1F80 Any Data Response message containing a cache line in
response to a core request. The AnyDataC messages are only
sent to an S-Box. The metric DRS.AnyResp - DRS.AnyDataC
will compute the number of DRS writeback and non snoop
write messages.
DRS.DataC_M 0x1C00
&&
Match1
[19:16]
0x8
0x1FE0
&&
Mask1
[19:16]
0xF
Data Response message of a cache line in M state that is
response to a core request. The DRS.DataC_M messages are
only sent to Intel® QPI.
DRS.DataC_E 0x1C00
&&
Match1
[19:16]
0x4
0x1FE0
&&
Mask1
[19:16]
0xF
Data Response message of a cache line in E state that is
response to a core request. The DRS.DataC_E messages are
only sent to Intel® QPI.
DRS.DataC_F 0x1C00
&&
Match1
[19:16]
0x1
0x1FE0
&&
Mask1
[19:16]
0xF
Data Response message of a cache line in F state that is
response to a core request. The DRS.DataC_F messages are
only sent to Intel® QPI.
DRS.DataC_E_Cmp 0x1C40
&&
Match1
[19:16]
0x4
0x1FE0
&&
Mask1
[19:16]
0xF
Complete Data Response message of a cache line in E state
that is response to a core request. The DRS.DataC_E
messages are only sent to Intel® QPI.
DRS.DataC_F_Cmp 0x1C40
&&
Match1
[19:16]
0x1
0x1FE0
&&
Mask1
[19:16]
0xF
Complete Data Response message of a cache line in F state
that is response to a core request. The DRS.DataC_F
messages are only sent to Intel® QPI.
DRS.DataC_E_FrcAc
kCnflt
0x1C20
&&
Match1
[19:16]
0x4
0x1FE0
&&
Mask1
[19:16]
0xF
Force Acknowledge Data Response message of a cache line in
E state that is response to a core request. The DRS.DataC_E
messages are only sent to Intel® QPI.
DRS.DataC_F_FrcAc
kCnflt
0x1C20
&&
Match1
[19:16]
0x1
0x1FE0
&&
Mask1
[19:16]
0xF
Force Acknowledge Data Response message of a cache line in
F state that is response to a core request. The DRS.DataC_F
messages are only sent to Intel® QPI.
DRS.WbIData 0x1C80 0x1FE0 Data Response message for Write Back data where cacheline is
set to the I state.
DRS.WbSData 0x1CA0 0x1FE0 Data Response message for Write Back data where cacheline is
set to the S state.
DRS.WbEData 0x1CC0 0x1FE0 Data Response message for Write Back data where cacheline is
set to the E state.
DRS.AnyResp 0x1C00 0x1E00 Any Data Response message. A DRS message can be either 9
flits for a full cache line or 11 flits for partial data.
DRS.AnyResp9flits 0x1C00 0x1F00 Any Data Response message that is 11 flits in length. An 11
flit DRS message contains partial data. Each 8 byte chunk
contains an enable field that specifies if the data is valid.
DRS.AnyResp11flits 0x1D00 0x1F00 Any Non Data Response completion message. A NDR message
is 1 on flit.
NCB.AnyResp 0x1800 0x1E00 Any Non-Coherent Bypass response message.