Pin 8 (Power on reset) is supported with the debug adapter revision C1 or newer.
The JCOMP pin is optional. Some microcontrollers don’t have this pin. Internally, this is actually
the JTAG TRST which resets the JTAG TAP state machine. Because the JTAG TAP state machine
can be reset also via the TMS and the TCK toggling, this pin is optional also for the debugger. If
microcontroller has the JCOMP pin but it is not connected to the target debug connector then
it must be set to non-active state in the target via a pull-up resistor. If not then the JTAG TAP
state machine remains in the reset state and debugging is not possible.
Jumper J1 (TCK)
If the TCK (debug JTAG clock) signal path from the target debug connector to the target
microcontroller is not designed as a single point to point connection, user may experience
signal integrity problems. For example, the TCK signal degrades electrically if it’s is routed to
multiple points, e.g. to the target microcontroller and also to some other IC(s), or expansion
connector(s) or even to another PCB. In such cases, signal integrity gets improved by adding a
buffer on the TCK driver side (J1: position 2-3).
Normally jumper J1 should be kept in default 1-2 position. When experiencing problems with
the initial debug connection or just unstable operation of the debugger, position 2-3 should be
tested.
Jumper J1 was introduced with the debug adapter revision D1. Previous versions A1, A2,
B1, C1 and C2 do not provide this jumper.
Jumper J2 (EVTIN)
Under some circumstances it can happen that the debugger cannot find any absolute program
counter message in the analyzed Nexus trace block. Consequentially, trace reconstruction fails
and errors or nothing gets displayed in the trace window. To avoid such situations, the
debugger can feed periodic signal to the EVTIN CPU pin connecting to the on-chip Nexus
engine, which then periodically generates and broadcasts program counter synchronization
messages.
In order to use this feature, the jumper J2 must be bridged and the ‘Force periodic Nexus SYNC’
option in the ‘Hardware/emulation Options/CPU Setup/Nexus’ tab must be checked. Refer to
iSYSTEM ‘Freescale MPC5xxx & ST SPC56 Family On-Chip Emulation’ technical notes document
for more details on the ‘Force periodic Nexus SYNC’ option use.
Note that the EVTI (Nexus Event In) CPU pin may be shared with other CPU functionalities. For
instance, on the MPC5516 the same pin can operate as the GPIO, the EBI read/write or the
EVTI. Whenever the CPU pin is configured and used for the EVTI alternate operation, the
jumper J2 must not be populated in order to prevent electrical conflicts.
Typically there is no need to use the ‘Force periodic Nexus SYNC’ functionality unless a
specific application code is traced, which does not generate messages containing
absolute program counter information. As long as the user has no problems with the
trace use, it is recommended to keep the jumper J2 disconnected.
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