8-10 Status Structure
Status register sets
As shown in Figure 8-1, there are four status register sets in the status structure of the power
supply: standard event status, operation event status, measurement event status and questionable
e
vent status.
Register bit descriptions
Standard event status
The used bits of the standard event register (shown in Figure 8-4) are described as follows:
• Bit B0, operation complete (
OPC) — Set bit indicates that all pending selected device
operations are completed and the power supply is ready to accept new commands. This
bit only sets in response to the *OPC command. See Section 9 for details on *OPC.
• Bit B2, query
error (QYE) — Set bit indicates that you attempted to read data from an
empty output queue.
• Bit B3
, device-dependent error (DDE) — Set bit indicates that an instrument operation
did not execute properly due to some internal condition.
• Bit
B4, execution error (EXE) — Set bit indicates that the power supply detected an
error while trying to execute a command.
• Bit B5,
command error (CME) — Set bit indicates that a command error has
occurred. Command errors include:
→IEEE-488.2 syn
tax error — power supply received a message that does not follow the
defined syntax of the IEEE-488.2 standard.
→Semantic
error — power supply received a command that was misspelled or received
an optional IEEE-488.2 command that is not implemented.
→The instrument
received a group execute trigger (GET) inside a program message.
• Bit B6,
user request (URQ) — Set bit indicates that the LOCAL key on the power
supply front panel was pressed.
• Bit B7,
power ON (PON) — Set bit indicates that the power supply has been turned off
and turned back on since the last time this register has been read.
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