Theory of Operation 4
Keysight 34420A Service Guide 115
DC Amplifier
This discussion refers to the Chapter 8, "DC Amplifier Schematic". The DC
Amplifier is used by every measuring function.
The dc input amplifier is comprised of dual FET U315, a cascade stage for U315
consisting ofQ305 through Q308, an active load stage for high gain consisting of
Q302 through Q304, and an output stage amplifier U306. Each range, for a full
scale input, is designed to produce a 10 Volt output to the AID Converter.
Resistors R311 and R312 prevent oscillation on high ranges and are shorted by
switches U303A and U303B at lower ranges.
A simplified schematic of the range selection is shown on the next page. The
amplifier gain is determined by two attenuators, U102C and RP1A. The
attenuators are isolated from each other by U307. Each attenuator can provide
the amplifier with a gain of X1, X10, or X100. The overall gain with both
attenuators in the feedback loop of the amplifier is the product of the gain
provided by each attenuator and can be X1, X10, X100, X1000, or X10000. As
implemented, the feedback for the X1 gain is provided by turning U304A on.
Dividers U101C and RP1A are used in series for high gain ranges. The table below
shows the relationship between range, amplifier gain, and the switches closed to
provide that gain.
The bias current of the dc amplifier is nulled using DAC U301 and amplifier
U314B. Together with R302 through 304, and CR301, they allow a few millivolts
of programmable voltage to be developed across R305. The resulting current flow
is used to null the input bias current of the dc amplifier.
Table 4-1 Amplifier gain
DCV range Amplifier gain Closed switches
.001 × 10000 U303C & D ×100 U101C ×100
.01 × 1000 U303C & D ×100 U101C ×10
.1 × 100 U304B ×10 U101C×10
1 × 10 U304D ×1 U101C ×10
10 × 1 U304A ×1
100 × 10 U304D ×1 U101C ×10
To Next Page
Loading...
Need help?
General
