FPΣ
Specifications
13 - 18
Item No. Name Default
value
Descriptions
Inter-
rupt
input
402 Pulse catch input settings Not set
X0 X1 X2 X3 X4 X5
X6
X7
Specify the input contacts used as pulse
catch input.
403 Interrupt input settings Not set
(When set: on → off is valid)
Specify the input contacts used as
interrupt input.
Specifytheeffectiveinterruptedge.
X0 X1 X2 X3 X4 X5
X6
X7
X0 X1 X2 X3 X4 X5
X6
X7
Notes
If the operation mode is set to 2-phase, individual, or direction
decision, the setting for CH1 is invalid in system register 400
and the setting for CH3 is invalid in system register 401.
If reset input settings overlap, the setting of CH1 takes
precedence in system register 400 and the setting of CH3
takes precedence in system register 401.
The settings for system register 402 and 403 are specified on
the screen, for each contact.
If system register 400 to 403 have been set simultaneously for
the same input relay, the following precedence order is
effective: [High-speed counter] ' [Pulse catch] ' [Interrupt
input].
Example:
When the high-speed counter is being used in the incremental
input mode, even if input X0 is specified as an interrupt input
and as pulse catch input, those settings are invalid, and input
X0 functions as counter input for the high-speed counter.
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