NEC switch - Page 15

User’s Manual U12978EJ3V0UD
15
LIST OF FIGURES (1/4)
Figure No. Title Page
2-1 Pin I/O Circuits ......................................................................................................................................... 34
3-1 Memory Map (
µ
PD789800) ...................................................................................................................... 35
3-2 Memory Map ( µ
PD78F9801).................................................................................................................... 36
3-3 Data Memory Addressing ( µ
PD789800) .................................................................................................. 38
3-4 Data Memory Addressing ( µ
PD78F9801) ................................................................................................ 39
3-5 Configuration of Program Counter ........................................................................................................... 40
3-6 Configuration of Program Status Word .................................................................................................... 40
3-7 Configuration of Stack Pointer ................................................................................................................. 42
3-8 Data to Be Saved to Stack Memory ......................................................................................................... 42
3-9 Data to Be Restored from Stack Memory................................................................................................. 42
3-10 Configuration of General-Purpose Registers ........................................................................................... 43
4-1 Port Types................................................................................................................................................ 57
4-2 Block Diagram of P00 to P07 ................................................................................................................... 60
4-3 Block Diagram of P10 to P17 ................................................................................................................... 61
4-4 Block Diagram of P20 .............................................................................................................................. 62
4-5 Block Diagram of P21 .............................................................................................................................. 63
4-6 Block Diagram of P22 .............................................................................................................................. 64
4-7 Block Diagram of P23 and P24 ................................................................................................................ 65
4-8 Block Diagram of P25 .............................................................................................................................. 66
4-9 Block Diagram of P26 .............................................................................................................................. 67
4-10 Block Diagram of P40 to P47 ................................................................................................................... 68
4-11 Format of Port Mode Register.................................................................................................................. 69
4-12 Format of Pull-up Resistor Option Register 0........................................................................................... 70
4-13 Format of Port Output Mode Register 0 ................................................................................................... 71
4-14 Format of Port Output Mode Register 1 ................................................................................................... 71
5-1 Block Diagram of Clock Generator........................................................................................................... 73
5-2 Format of Processor Clock Control Register............................................................................................ 74
5-3 External Circuit of System Clock Oscillator.............................................................................................. 75
5-4 Examples of Incorrect Resonator Connection.......................................................................................... 76
5-5 Switching of CPU Clock ........................................................................................................................... 78
6-1 Block Diagram of 8-Bit Timer 00 .............................................................................................................. 80
6-2 Block Diagram of 8-Bit Timer/Event Counter 01 ...................................................................................... 81
6-3 Format of 8-Bit Timer Mode Control Register 00 ..................................................................................... 82
6-4 Format of 8-Bit Timer Mode Control Register 01 ..................................................................................... 83
6-5 Format of Port Mode Register 2............................................................................................................... 84
6-6 Interval Timer Operation Timing of 8-Bit Timer 00 ................................................................................... 86