NEC switch - Page 36

CHAPTER 3 CPU ARCHITECTURE
User’s Manual U12978EJ3V0UD
36
Figure 3-2. Memory Map ( µ
µµ
µ PD78F9801)
Reserved
Flash memory
16,384 × 8 bits
Internal high-speed RAM
256 × 8 bits
Special function register
256 × 8 bits
HFFFF
H00FF
HFFEF
H00EF
HFFDF
HFFF3
H0800
HF700
H0400
HF300
HA100
H9100
H0000
H0004
H0000
Data memory
space
Program memory
space
Program area
CALLT table area
Vector table area
Program area
HFFF3