Nvidia Jetson AGX Xavier Series User Manual

Audio
Jetson AGX Xavier Series Product DG-09840-001_v2.5 | 102
Module Pin Name (Xavier
Function)
Type Termination Description
I2S1_DIN (I2S1_SDIN)
I2S2_DIN (I2S2_SDIN)
I2S3_DIN (I2S4_SDIN)
JAX: GPIO04 (I2S6_SDIN)
JAXi: No I2S support. GPIO only.
I
I2S Data Input: Connect to Data Output
pin of audio device.
AUD_MCLK O
Audio Codec Master Clock: Connect to
clock pin of Audio Codec.
GPIO20_AUD_INT I
Audio Interrupt: Connect to interrupt
pin of Audio Codec.
12.1.2 DMIC Design Guidelines
The following table details the signal routing requirements for the DMIC interface.
Table 12-5. DMIC Interface Signal Routing Requirements
Parameter Requirement Units Notes
Clock Frequency/Period 12/83.33 MHz/ns
Data Bit-rate/Period (DDR24) 24/41.66 Mbps/ns
Configuration / Device Organization 1 load
Topology Point to Point
Reference plane
GND
Trace Impedance 45-50 Ω ±20%
Via proximity (Signal via to GND return via) < 3.8 (24) mm (ps) See Note
Trace spacing – Microstrip / Stripline 2x / 2x dielectric
Max Trace Delay 1280
ps
Max Trace Delay Skew between
CLK
and
DAT
150
ps
Note: Up to 4 signal vias can share a single GND return via.
Table 12-6. DMIC Signal Connections
Module Pin Name (Xavier
Function)
Type Terminatio
n
Description
GPIO09 (DMIC[5 or 3]_CLK) O Digital Microphone Clock: Connect to clock pin of DMIC
device
GPIO08 (DMIC[5 or 3]_DAT) I Digital Microphone Data: Connect to data pin of DMIC device

Nvidia Jetson AGX Xavier Series Specifications

General

GPU	512-core Volta GPU with Tensor Cores
CPU	8-core ARM v8.2 64-bit CPU, 8MB L2 + 4MB L3
Memory	32GB 256-Bit LPDDR4x | 137GB/s
Storage	32GB eMMC 5.1
DL Accelerator	2x NVDLA Engines
Vision Accelerator	7-way VLIW Vision Processor
Dimensions	105 mm x 105 mm
AI Performance	32 TOPS (INT8)
Connectivity	10/100/1000 BASE-T Ethernet
PCIe	16x PCIe Gen4
USB	USB 3.1, USB 2.0
Power	10W / 15W / 30W
Display	eDP