Nvidia Jetson AGX Xavier Series User Manual

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Jetson AGX Xavier Series Product DG-09840-001_v2.5 | 70
Figure 9-3. HDMI Connection Example
Jetson AGX Xavier
CEC Gating
Circui try
10 kΩ 10 kΩ
VDD_3 V3
1. 8kΩ 1. 8kΩ
SoC
- HDMI
HDMI_DPx_TXDP3
HDMI_DPx_TXDN3
HDMI_DPx_TXDP2
HDMI_DPx_TXDN2
HDMI_DPx_TXDP1
HDMI_DPx_TXDN1
HDMI_DPx_TXDP0
HDMI_DPx_TXDN0
DP_AUX_CHx_P
DP_AUX_CHx_N
DP_AUX_CHx_HPD
EDP
HDMI_DPx
HDMI_CEC
10 kΩ
FET
Enable5V 0_ HDMI_ EN
0. 1uF
0. 1uF
0. 1uF
0. 1uF
0. 1uF
0. 1uF
0. 1uF
0. 1uF
49 9Ω,
1%
60 0Ω
@10 0M Hz
Se e No te 2
Lev el Shif te r
Lev el Shif te r
VDD_1 V8
DP0 /DP1/ DP2
SCL
SDA
HPD
CK+
CK-
D0+
D0-
D1+
D1-
D2+
D2-
CEC
+5V
ES D
10 0kΩ
0. 1uF
HDMI
Connector
10 0kΩ
10 uF
EMI
Se e No te 3
See
Note 3
Se e No te 4
ES D
R
S
R
S
R
S
R
S
R
S
R
S
R
S
R
S
See
Note 5
CMC
DPx_HPD
DPx_AUX_CH_P
DPx_AUX_CH_N
HDMI_DPx_TX0_P
HDMI_DPx_TX0_N
HDMI_DPx_TX1_P
HDMI_DPx_TX1_N
HDMI_DPx_TX2_P
HDMI_DPx_TX2_N
HDMI_DPx_TX3_P
HDMI_DPx_TX3_N
GP IO 20
TX 2_ P
TX 2_ N
TX 1_ P
TX 1_ N
TX 0_ P
TX 0_ N
TX C_ P
TX C_ N
H49/A47/D51
H48/A48/D52
G51/B49/B51
G50/B48/B52
J47/D49/A51
J48/D48/A50
K46/E50/C51
K47/E51/C50
K52/K51/K50
F52/J52/G 53
F51/J53/G 54
J50
VDD_5V0_HDMI_CONVDD_5V
Load Switch
EN
IN OUT
AUDIO_HV
DAP 6_ FS
A58
4. 7kΩ
5V 0_ HDMI_ EN
10 0kΩ
Se e No te 1
Notes:
1. The load switch circuit shown is intended to remove power to the HDMI connector and related
circuitry to avoid backdrive on signals to the module. Other mechanisms may be used but
must prevent module pins being driven when the module is off.
2. Level shifters required on DDC/HPD. Jetson AGX Xavier pads are not 5V tolerant and cannot
directly meet HDMI VIL/VIH requirements. HPD level shifter can be non-inverting or inverting.
3. If EMI/ESD devices are necessary, they must be tuned to minimize the impact to signal quality,
which must meet the timing and electrical requirements of the HDMI specification for the
modes to be supported. ee requirements and recommendations in the related sections of
Table 9-6.
4. The HDMI_DP_TXx pads are native DP pads and require series AC capacitors (ACCAP) and
pull-downs (RPD) to be HDMI compliant. The 499Ω, 1% pull-downs must be disabled when
SoC is off to meet the HDMI VOFF requirement. The enable to the FET, enables the pull-downs
when the HDMI interface is to be used. Chokes between pull-downs and FET are required for
Standard Technology designs and recommended for HDI designs.
5. Series resistors RS are required. See the RS section of Table 9-6 for details.

Nvidia Jetson AGX Xavier Series Specifications

General

GPU	512-core Volta GPU with Tensor Cores
CPU	8-core ARM v8.2 64-bit CPU, 8MB L2 + 4MB L3
Memory	32GB 256-Bit LPDDR4x | 137GB/s
Storage	32GB eMMC 5.1
DL Accelerator	2x NVDLA Engines
Vision Accelerator	7-way VLIW Vision Processor
Dimensions	105 mm x 105 mm
AI Performance	32 TOPS (INT8)
Connectivity	10/100/1000 BASE-T Ethernet
PCIe	16x PCIe Gen4
USB	USB 3.1, USB 2.0
Power	10W / 15W / 30W
Display	eDP