Nvidia Jetson AGX Xavier Series User Manual

USB, PCIe, and UFS
Jetson AGX Xavier Series Product DG-09840-001_v2.5 | 38
Pin # Module Pin
Name
SoC Signal Usage/Description Usage on NVIDIA Carrier
Board
Direction Pin Type
A14 UPHY_RX8_N PEX_RX8_N UPHY Receive 8. PCIe x2 controller #4,
lane 0.
Unused
A15 UPHY_RX8_P PEX_RX8_P
C14 UPHY_RX9_N PEX_RX9_N UPHY Receive 9. PCIe x2 controller #4,
lane 1.
C15 UPHY_RX9_P PEX_RX9_P
B13 UPHY_RX10_N PEX_RX10_N UPHY Receive 10. UFS lane. Micro SD / UFS Card Socket UPHY Diff Pair
B12 UPHY_RX10_P PEX_RX10_P
D13 UPHY_RX11_N PEX_RX11_N UPHY Receive 11. USB 3.1 port 3.
USB / eSATA Connector (USB
3.1)
UPHY Diff Pair
D12 UPHY_RX11_P PEX_RX11_P
J23 UPHY_TX0_N PEX_TX0_N UPHY Transmit 0. PCIe x1 controller #1. eSATA Bridge Output UPHY Diff Pair
J22 UPHY_TX0_P PEX_TX0_P
G22 UPHY_TX1_N PEX_TX1_N UPHY Transmit 1. USB 3.1 port 2. USB Type C Alt Mode Switch
#1
G23 UPHY_TX1_P PEX_TX1_P
K20 UPHY_TX2_N PEX_TX2_N UPHY Transmit 2. PCIe x4 controller #0,
lane 0.
M.2 Key M Connector
K21 UPHY_TX2_P PEX_TX2_P
H21 UPHY_TX3_N PEX_TX3_N UPHY Transmit 3. PCIe x4 controller #0,
lane 1.
H20 UPHY_TX3_P PEX_TX3_P
J19
UPHY_TX4_N
PEX_TX4_N
UPHY Transmit 4. PCIe x4 controller #0,
lane 2.
J18 UPHY_TX4_P PEX_TX4_P
G18 UPHY_TX5_N PEX_TX5_N UPHY Transmit 5. PCIe x4 controller #0,
lane 3.
G19 UPHY_TX5_P PEX_TX5_P
K16 UPHY_TX6_N PEX_TX6_N UPHY Transmit 6. USB 3.1 port 0.
USB Type C Alt Mode Switch
#2
K17 UPHY_TX6_P PEX_TX6_P
H17 UPHY_TX7_N PEX_TX7_N UPHY Transmit 7. PCIe x1 controller #3. M.2 Key E Connector
H16 UPHY_TX7_P PEX_TX7_P
J15 UPHY_TX8_N PEX_TX8_N
UPHY Transmit 8. PCIe x2 controller #4,
lane 0.
Unused
J14
UPHY_TX8_P
PEX_TX8_P
G14 UPHY_TX9_N PEX_TX9_N UPHY Transmit 9. PCIe x2 controller #4,
lane 1.
G15 UPHY_TX9_P PEX_TX9_P
K12 UPHY_TX10_N PEX_TX10_N UPHY Transmit 10. UFS lane. Micro SD / UFS Card Socket UPHY Diff Pair
K13 UPHY_TX10_P PEX_TX10_P
H13 UPHY_TX11_N PEX_TX11_N UPHY Transmit 11. USB 3.1 port 3.
USB / eSATA Connector (USB
3.1)
UPHY Diff Pair
H12 UPHY_TX11_P PEX_TX11_P
Notes:
1. In the Type/Dir column, Output is from Jetson AGX Xavier. Input is to Jetson AGX Xavier. Bidir is for Bidirectional
signals.
Table 7-3. NVHS for PCIe x8 Data Lan Pin Descriptions
Pin # Module Pin Name SoC Signal Usage/Description Usage on NVIDIA
Carrier Board
Direction Pin Type
D25
NVHS0_SLVS_RX0_N
NVHS0_RX0_N
PCIe/SLVS 0 Receive Lane 0. PCIe x8
controller #5 or SLVS, lane 0.
PCIe x16 Connector Input
UPHY/SLVS Diff
Pair
D24 NVHS0_SLVS_RX0_P NVHS0_RX0_P
B24 NVHS0_SLVS_RX1_N NVHS0_RX1_N PCIe/SLVS 0 Receive Lane 1. PCIe x8
controller #5 or SLVS, lane 1.
B25 NVHS0_SLVS_RX1_P NVHS0_RX1_P
C26 NVHS0_SLVS_RX2_N NVHS0_RX2_N PCIe/SLVS 0 Receive Lane 2. PCIe x8
controller #5 or SLVS, lane 2.
C27 NVHS0_SLVS_RX2_P NVHS0_RX2_P
A27 NVHS0_SLVS_RX3_N NVHS0_RX3_N PCIe/SLVS 0 Receive Lane 3. PCIe x8
controller #5 or SLVS, lane 3.
A26 NVHS0_SLVS_RX3_P NVHS0_RX3_P
D29 NVHS0_SLVS_RX4_N NVHS0_RX4_N PCIe/SLVS 0 Receive Lane 4. PCIe x8
controller #5 or SLVS, lane 4.
D28 NVHS0_SLVS_RX4_P NVHS0_RX4_P
B28 NVHS0_SLVS_RX5_N NVHS0_RX5_N PCIe/SLVS 0 Receive Lane 5. PCIe x8
controller #5 or SLVS, lane 5.
B29 NVHS0_SLVS_RX5_P NVHS0_RX5_P
C30 NVHS0_SLVS_RX6_N NVHS0_RX6_N

Nvidia Jetson AGX Xavier Series Specifications

General

GPU	512-core Volta GPU with Tensor Cores
CPU	8-core ARM v8.2 64-bit CPU, 8MB L2 + 4MB L3
Memory	32GB 256-Bit LPDDR4x | 137GB/s
Storage	32GB eMMC 5.1
DL Accelerator	2x NVDLA Engines
Vision Accelerator	7-way VLIW Vision Processor
Dimensions	105 mm x 105 mm
AI Performance	32 TOPS (INT8)
Connectivity	10/100/1000 BASE-T Ethernet
PCIe	16x PCIe Gen4
USB	USB 3.1, USB 2.0
Power	10W / 15W / 30W
Display	eDP