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Nvidia Jetson AGX Xavier Series User Manual

Nvidia Jetson AGX Xavier Series
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General Routing Guidelines
Jetson AGX Xavier Series Product DG-09840-001_v2.5 | 35
6.2 Routing Guideline Format
The routing guidelines have the following format to specify how a signal should be routed.
Breakout traces are traces routed from a BGA or other pin array, either to a point beyond
the array, or to another layer where full normal spacing guidelines can be met. Breakout
trace delay limited to 500 mils unless otherwise specified.
After breakout, signal should be routed according to specified impedance for differential,
single-ended, or both (for example: HDMI). Trace spacing to other signals also specified.
Follow max and min trace delays where specified. Trace delays are typically shown in mm
or in terms of signal delay in pico-seconds (ps) or both.
For differential signals, trace spacing to other signals must be larger of specified ×
dielectric height or inter-pair spacing
Spacing to other signals and pairs cannot be smaller than spacing between
complementary signals (intra-pair).
Total trace delay depends on signal velocity which is different between outer
(microstrip) and inner (stripline) layers of a PCB.
6.3 Signal Routing Conventions
Throughout this design guide, the following signal routing conventions are used:
SE Impedance (/ Diff Impedance) at x Dielectric Height Spacing
Single-ended (SE) impedance of trace (along with differential impedance for diff pairs) is
achieved by spacing requirement. Spacing is multiple of dielectric height. Dielectric height
is typically different for microstrip and stripline. Note: 1 mil = 1/1000th of an inch.
Note: Trace spacing requirement applies to SE traces or differential pairs to other SE traces or
differential pairs. It does not apply to traces making up a differential pair. For this case,
spacing/trace widths are chosen to meet differential impedance requirement.
6.4 Routing Guidelines
Pay close attention when routing high speed interfaces, such as HDMI and DP, USB 3.1, PCIe
or DSI/CSI. Each of these interfaces has strict routing rules for the trace impedance, width,
spacing, total delay, and delay/flight time matching. The following guidelines provide an
overview of the routing guidelines and notations used in this design guide.
Controlled Impedance
Each interface has different trace impedance requirements and spacing to other traces. It
is up to designer to calculate trace width and spacing required to achieve specified single-
ended (SE) and differential (Diff) impedances. Unless otherwise noted, trace impedance
values are ±15%.

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Nvidia Jetson AGX Xavier Series Specifications

General IconGeneral
GPU512-core Volta GPU with Tensor Cores
CPU8-core ARM v8.2 64-bit CPU, 8MB L2 + 4MB L3
Memory32GB 256-Bit LPDDR4x | 137GB/s
Storage32GB eMMC 5.1
DL Accelerator2x NVDLA Engines
Vision Accelerator7-way VLIW Vision Processor
Dimensions105 mm x 105 mm
AI Performance32 TOPS (INT8)
Connectivity10/100/1000 BASE-T Ethernet
PCIe16x PCIe Gen4
USBUSB 3.1, USB 2.0
Power10W / 15W / 30W
DisplayeDP

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