Nvidia Jetson Orin NX - Page 8

PRELIMINARY INFORMATION
NVIDIA Jetson Orin NX DG-10931-001_v0.1 | viii
Table 12-6. SPI Signal Connections ........................................................................................ 65
Table 12-7. Jetson Orin NX UART Pin Descriptions ............................................................... 66
Table 12-8. UART Signal Connections .................................................................................... 67
Table 12-9. Jetson Orin NX CAN Pin Descriptions ................................................................. 67
Table 12-10. CAN Interface Signal Routing Requirements ..................................................... 67
Table 12-11. CAN Signal Connections ...................................................................................... 68
Table 12-12. Jetson Orin NX Fan Pin Descriptions .................................................................. 68
Table 12-13. Jetson Orin NX Debug UART Pin Descriptions ................................................... 69
Table 12-14. Debug UART Connections .................................................................................... 69
Table 13-1. Pins Pulled or Driven High by Orin Prior to SYS_RESET* Inactive .................... 71
Table 13-2. Pins with External Pull-Ups to Supply on before SYS_RESET* Inactive ........... 71
Table 14-1. Unused MPIO Pins and Pin Group ....................................................................... 72
Table 17-1. Signal Type Codes ................................................................................................ 75
Table 17-2. Common High-Speed Interface Requirements .................................................. 78